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Searched refs:FMU_FSTAT_FAIL_MASK (Results 1 – 25 of 27) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/flash_k4/
Dfsl_flash_adapter.h31 #define FLASH_FSTAT_FAIL_MASK FMU_FSTAT_FAIL_MASK
69 #define FLASH_FSTAT_FAIL_MASK FMU_FSTAT_FAIL_MASK
/hal_nxp-latest/mcux/mcux-sdk/drivers/eeprom_emulation/
Dfsl_eeprom_emulation.h313 #define FMU_CHECK_FAIL (FMU0->FSTAT & FMU_FSTAT_FAIL_MASK)
315 #define FMU_CHECK_ERR (FMU0->FSTAT & (FMU_FSTAT_ACCERR_MASK | FMU_FSTAT_FAIL_MASK | FMU_FSTAT_PV…
326 #define FLASH_FSTAT_FAIL_MASK FMU_FSTAT_FAIL_MASK
Dfsl_eeprom_emulation.c269 if (0x00U != (FMU0->FSTAT & FMU_FSTAT_FAIL_MASK)) in AT_QUICKACCESS_SECTION_CODE()
332 if (0x00U != (FMU0->FSTAT & FMU_FSTAT_FAIL_MASK)) in AT_QUICKACCESS_SECTION_CODE()
428 if (0U != (FMU0->FSTAT & FMU_FSTAT_FAIL_MASK)) in AT_QUICKACCESS_SECTION_CODE()
503 if (0x00U != (FMU0->FSTAT & FMU_FSTAT_FAIL_MASK)) in AT_QUICKACCESS_SECTION_CODE()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h6018 #define FMU_FSTAT_FAIL_MASK (0x1U) macro
6024 … (((uint32_t)(((uint32_t)(x)) << FMU_FSTAT_FAIL_SHIFT)) & FMU_FSTAT_FAIL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h6018 #define FMU_FSTAT_FAIL_MASK (0x1U) macro
6024 … (((uint32_t)(((uint32_t)(x)) << FMU_FSTAT_FAIL_SHIFT)) & FMU_FSTAT_FAIL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h6018 #define FMU_FSTAT_FAIL_MASK (0x1U) macro
6024 … (((uint32_t)(((uint32_t)(x)) << FMU_FSTAT_FAIL_SHIFT)) & FMU_FSTAT_FAIL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h6018 #define FMU_FSTAT_FAIL_MASK (0x1U) macro
6024 … (((uint32_t)(((uint32_t)(x)) << FMU_FSTAT_FAIL_SHIFT)) & FMU_FSTAT_FAIL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h9073 #define FMU_FSTAT_FAIL_MASK (0x1U) macro
9079 … (((uint32_t)(((uint32_t)(x)) << FMU_FSTAT_FAIL_SHIFT)) & FMU_FSTAT_FAIL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h9073 #define FMU_FSTAT_FAIL_MASK (0x1U) macro
9079 … (((uint32_t)(((uint32_t)(x)) << FMU_FSTAT_FAIL_SHIFT)) & FMU_FSTAT_FAIL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h9073 #define FMU_FSTAT_FAIL_MASK (0x1U) macro
9079 … (((uint32_t)(((uint32_t)(x)) << FMU_FSTAT_FAIL_SHIFT)) & FMU_FSTAT_FAIL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h9077 #define FMU_FSTAT_FAIL_MASK (0x1U) macro
9083 … (((uint32_t)(((uint32_t)(x)) << FMU_FSTAT_FAIL_SHIFT)) & FMU_FSTAT_FAIL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h9077 #define FMU_FSTAT_FAIL_MASK (0x1U) macro
9083 … (((uint32_t)(((uint32_t)(x)) << FMU_FSTAT_FAIL_SHIFT)) & FMU_FSTAT_FAIL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/
DMCXA155.h9077 #define FMU_FSTAT_FAIL_MASK (0x1U) macro
9083 … (((uint32_t)(((uint32_t)(x)) << FMU_FSTAT_FAIL_SHIFT)) & FMU_FSTAT_FAIL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/
DMCXW716A.h9254 #define FMU_FSTAT_FAIL_MASK (0x1U) macro
9260 … (((uint32_t)(((uint32_t)(x)) << FMU_FSTAT_FAIL_SHIFT)) & FMU_FSTAT_FAIL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/
DMCXW716C.h11423 #define FMU_FSTAT_FAIL_MASK (0x1U) macro
11429 … (((uint32_t)(((uint32_t)(x)) << FMU_FSTAT_FAIL_SHIFT)) & FMU_FSTAT_FAIL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h16105 #define FMU_FSTAT_FAIL_MASK (0x1U) macro
16111 … (((uint32_t)(((uint32_t)(x)) << FMU_FSTAT_FAIL_SHIFT)) & FMU_FSTAT_FAIL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h16075 #define FMU_FSTAT_FAIL_MASK (0x1U) macro
16081 … (((uint32_t)(((uint32_t)(x)) << FMU_FSTAT_FAIL_SHIFT)) & FMU_FSTAT_FAIL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/
DMCXW727C_cm33_core0.h11926 #define FMU_FSTAT_FAIL_MASK (0x1U) macro
11932 … (((uint32_t)(((uint32_t)(x)) << FMU_FSTAT_FAIL_SHIFT)) & FMU_FSTAT_FAIL_MASK)
DMCXW727C_cm33_core1.h20274 #define FMU_FSTAT_FAIL_MASK (0x1U) macro
20280 … (((uint32_t)(((uint32_t)(x)) << FMU_FSTAT_FAIL_SHIFT)) & FMU_FSTAT_FAIL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h24813 #define FMU_FSTAT_FAIL_MASK (0x1U) macro
24819 … (((uint32_t)(((uint32_t)(x)) << FMU_FSTAT_FAIL_SHIFT)) & FMU_FSTAT_FAIL_MASK)
DMCXN546_cm33_core1.h24813 #define FMU_FSTAT_FAIL_MASK (0x1U) macro
24819 … (((uint32_t)(((uint32_t)(x)) << FMU_FSTAT_FAIL_SHIFT)) & FMU_FSTAT_FAIL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h24813 #define FMU_FSTAT_FAIL_MASK (0x1U) macro
24819 … (((uint32_t)(((uint32_t)(x)) << FMU_FSTAT_FAIL_SHIFT)) & FMU_FSTAT_FAIL_MASK)
DMCXN547_cm33_core1.h24813 #define FMU_FSTAT_FAIL_MASK (0x1U) macro
24819 … (((uint32_t)(((uint32_t)(x)) << FMU_FSTAT_FAIL_SHIFT)) & FMU_FSTAT_FAIL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h24859 #define FMU_FSTAT_FAIL_MASK (0x1U) macro
24865 … (((uint32_t)(((uint32_t)(x)) << FMU_FSTAT_FAIL_SHIFT)) & FMU_FSTAT_FAIL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h24859 #define FMU_FSTAT_FAIL_MASK (0x1U) macro
24865 … (((uint32_t)(((uint32_t)(x)) << FMU_FSTAT_FAIL_SHIFT)) & FMU_FSTAT_FAIL_MASK)

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