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Searched refs:FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK (Results 1 – 20 of 20) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h8663 #define FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK (0xC000000U) macro
8666 …t)(x)) << FMUTEST_SMW_SETTING_OPTION0_IPGM_END_SHIFT)) & FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h8663 #define FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK (0xC000000U) macro
8666 …t)(x)) << FMUTEST_SMW_SETTING_OPTION0_IPGM_END_SHIFT)) & FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h8663 #define FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK (0xC000000U) macro
8666 …t)(x)) << FMUTEST_SMW_SETTING_OPTION0_IPGM_END_SHIFT)) & FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h8663 #define FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK (0xC000000U) macro
8666 …t)(x)) << FMUTEST_SMW_SETTING_OPTION0_IPGM_END_SHIFT)) & FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h11718 #define FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK (0xC000000U) macro
11721 …t)(x)) << FMUTEST_SMW_SETTING_OPTION0_IPGM_END_SHIFT)) & FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h11718 #define FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK (0xC000000U) macro
11721 …t)(x)) << FMUTEST_SMW_SETTING_OPTION0_IPGM_END_SHIFT)) & FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h11718 #define FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK (0xC000000U) macro
11721 …t)(x)) << FMUTEST_SMW_SETTING_OPTION0_IPGM_END_SHIFT)) & FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h11722 #define FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK (0xC000000U) macro
11725 …t)(x)) << FMUTEST_SMW_SETTING_OPTION0_IPGM_END_SHIFT)) & FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h11722 #define FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK (0xC000000U) macro
11725 …t)(x)) << FMUTEST_SMW_SETTING_OPTION0_IPGM_END_SHIFT)) & FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/
DMCXA155.h11722 #define FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK (0xC000000U) macro
11725 …t)(x)) << FMUTEST_SMW_SETTING_OPTION0_IPGM_END_SHIFT)) & FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h18766 #define FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK (0xC000000U) macro
18769 …t)(x)) << FMUTEST_SMW_SETTING_OPTION0_IPGM_END_SHIFT)) & FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h18736 #define FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK (0xC000000U) macro
18739 …t)(x)) << FMUTEST_SMW_SETTING_OPTION0_IPGM_END_SHIFT)) & FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h27474 #define FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK (0xC000000U) macro
27477 …t)(x)) << FMUTEST_SMW_SETTING_OPTION0_IPGM_END_SHIFT)) & FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK)
DMCXN546_cm33_core1.h27474 #define FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK (0xC000000U) macro
27477 …t)(x)) << FMUTEST_SMW_SETTING_OPTION0_IPGM_END_SHIFT)) & FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h27474 #define FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK (0xC000000U) macro
27477 …t)(x)) << FMUTEST_SMW_SETTING_OPTION0_IPGM_END_SHIFT)) & FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK)
DMCXN547_cm33_core1.h27474 #define FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK (0xC000000U) macro
27477 …t)(x)) << FMUTEST_SMW_SETTING_OPTION0_IPGM_END_SHIFT)) & FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h27520 #define FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK (0xC000000U) macro
27523 …t)(x)) << FMUTEST_SMW_SETTING_OPTION0_IPGM_END_SHIFT)) & FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK)
DMCXN947_cm33_core0.h27520 #define FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK (0xC000000U) macro
27523 …t)(x)) << FMUTEST_SMW_SETTING_OPTION0_IPGM_END_SHIFT)) & FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h27520 #define FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK (0xC000000U) macro
27523 …t)(x)) << FMUTEST_SMW_SETTING_OPTION0_IPGM_END_SHIFT)) & FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK)
DMCXN946_cm33_core1.h27520 #define FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK (0xC000000U) macro
27523 …t)(x)) << FMUTEST_SMW_SETTING_OPTION0_IPGM_END_SHIFT)) & FMUTEST_SMW_SETTING_OPTION0_IPGM_END_MASK)