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Searched refs:FMUTEST_R_IP_CONFIG_TSTCTL_MASK (Results 1 – 20 of 20) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h7830 #define FMUTEST_R_IP_CONFIG_TSTCTL_MASK (0x300000U) macro
7838 …(uint32_t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_TSTCTL_SHIFT)) & FMUTEST_R_IP_CONFIG_TSTCTL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h7830 #define FMUTEST_R_IP_CONFIG_TSTCTL_MASK (0x300000U) macro
7838 …(uint32_t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_TSTCTL_SHIFT)) & FMUTEST_R_IP_CONFIG_TSTCTL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h7830 #define FMUTEST_R_IP_CONFIG_TSTCTL_MASK (0x300000U) macro
7838 …(uint32_t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_TSTCTL_SHIFT)) & FMUTEST_R_IP_CONFIG_TSTCTL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h7830 #define FMUTEST_R_IP_CONFIG_TSTCTL_MASK (0x300000U) macro
7838 …(uint32_t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_TSTCTL_SHIFT)) & FMUTEST_R_IP_CONFIG_TSTCTL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h10885 #define FMUTEST_R_IP_CONFIG_TSTCTL_MASK (0x300000U) macro
10893 …(uint32_t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_TSTCTL_SHIFT)) & FMUTEST_R_IP_CONFIG_TSTCTL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h10885 #define FMUTEST_R_IP_CONFIG_TSTCTL_MASK (0x300000U) macro
10893 …(uint32_t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_TSTCTL_SHIFT)) & FMUTEST_R_IP_CONFIG_TSTCTL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h10885 #define FMUTEST_R_IP_CONFIG_TSTCTL_MASK (0x300000U) macro
10893 …(uint32_t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_TSTCTL_SHIFT)) & FMUTEST_R_IP_CONFIG_TSTCTL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h10889 #define FMUTEST_R_IP_CONFIG_TSTCTL_MASK (0x300000U) macro
10897 …(uint32_t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_TSTCTL_SHIFT)) & FMUTEST_R_IP_CONFIG_TSTCTL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h10889 #define FMUTEST_R_IP_CONFIG_TSTCTL_MASK (0x300000U) macro
10897 …(uint32_t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_TSTCTL_SHIFT)) & FMUTEST_R_IP_CONFIG_TSTCTL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/
DMCXA155.h10889 #define FMUTEST_R_IP_CONFIG_TSTCTL_MASK (0x300000U) macro
10897 …(uint32_t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_TSTCTL_SHIFT)) & FMUTEST_R_IP_CONFIG_TSTCTL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h17933 #define FMUTEST_R_IP_CONFIG_TSTCTL_MASK (0x300000U) macro
17941 …(uint32_t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_TSTCTL_SHIFT)) & FMUTEST_R_IP_CONFIG_TSTCTL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h17903 #define FMUTEST_R_IP_CONFIG_TSTCTL_MASK (0x300000U) macro
17911 …(uint32_t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_TSTCTL_SHIFT)) & FMUTEST_R_IP_CONFIG_TSTCTL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h26641 #define FMUTEST_R_IP_CONFIG_TSTCTL_MASK (0x300000U) macro
26649 …(uint32_t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_TSTCTL_SHIFT)) & FMUTEST_R_IP_CONFIG_TSTCTL_MASK)
DMCXN546_cm33_core1.h26641 #define FMUTEST_R_IP_CONFIG_TSTCTL_MASK (0x300000U) macro
26649 …(uint32_t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_TSTCTL_SHIFT)) & FMUTEST_R_IP_CONFIG_TSTCTL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h26641 #define FMUTEST_R_IP_CONFIG_TSTCTL_MASK (0x300000U) macro
26649 …(uint32_t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_TSTCTL_SHIFT)) & FMUTEST_R_IP_CONFIG_TSTCTL_MASK)
DMCXN547_cm33_core1.h26641 #define FMUTEST_R_IP_CONFIG_TSTCTL_MASK (0x300000U) macro
26649 …(uint32_t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_TSTCTL_SHIFT)) & FMUTEST_R_IP_CONFIG_TSTCTL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h26687 #define FMUTEST_R_IP_CONFIG_TSTCTL_MASK (0x300000U) macro
26695 …(uint32_t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_TSTCTL_SHIFT)) & FMUTEST_R_IP_CONFIG_TSTCTL_MASK)
DMCXN947_cm33_core0.h26687 #define FMUTEST_R_IP_CONFIG_TSTCTL_MASK (0x300000U) macro
26695 …(uint32_t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_TSTCTL_SHIFT)) & FMUTEST_R_IP_CONFIG_TSTCTL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h26687 #define FMUTEST_R_IP_CONFIG_TSTCTL_MASK (0x300000U) macro
26695 …(uint32_t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_TSTCTL_SHIFT)) & FMUTEST_R_IP_CONFIG_TSTCTL_MASK)
DMCXN946_cm33_core1.h26687 #define FMUTEST_R_IP_CONFIG_TSTCTL_MASK (0x300000U) macro
26695 …(uint32_t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_TSTCTL_SHIFT)) & FMUTEST_R_IP_CONFIG_TSTCTL_MASK)