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Searched refs:FLEXSPI_IPEDCTX6IV1_CTX6_IV1_MASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h24655 #define FLEXSPI_IPEDCTX6IV1_CTX6_IV1_MASK (0xFFFFFFFFU) macro
24658 …t32_t)(((uint32_t)(x)) << FLEXSPI_IPEDCTX6IV1_CTX6_IV1_SHIFT)) & FLEXSPI_IPEDCTX6IV1_CTX6_IV1_MASK)
DMCXN546_cm33_core1.h24655 #define FLEXSPI_IPEDCTX6IV1_CTX6_IV1_MASK (0xFFFFFFFFU) macro
24658 …t32_t)(((uint32_t)(x)) << FLEXSPI_IPEDCTX6IV1_CTX6_IV1_SHIFT)) & FLEXSPI_IPEDCTX6IV1_CTX6_IV1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h24655 #define FLEXSPI_IPEDCTX6IV1_CTX6_IV1_MASK (0xFFFFFFFFU) macro
24658 …t32_t)(((uint32_t)(x)) << FLEXSPI_IPEDCTX6IV1_CTX6_IV1_SHIFT)) & FLEXSPI_IPEDCTX6IV1_CTX6_IV1_MASK)
DMCXN547_cm33_core1.h24655 #define FLEXSPI_IPEDCTX6IV1_CTX6_IV1_MASK (0xFFFFFFFFU) macro
24658 …t32_t)(((uint32_t)(x)) << FLEXSPI_IPEDCTX6IV1_CTX6_IV1_SHIFT)) & FLEXSPI_IPEDCTX6IV1_CTX6_IV1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h24701 #define FLEXSPI_IPEDCTX6IV1_CTX6_IV1_MASK (0xFFFFFFFFU) macro
24704 …t32_t)(((uint32_t)(x)) << FLEXSPI_IPEDCTX6IV1_CTX6_IV1_SHIFT)) & FLEXSPI_IPEDCTX6IV1_CTX6_IV1_MASK)
DMCXN947_cm33_core0.h24701 #define FLEXSPI_IPEDCTX6IV1_CTX6_IV1_MASK (0xFFFFFFFFU) macro
24704 …t32_t)(((uint32_t)(x)) << FLEXSPI_IPEDCTX6IV1_CTX6_IV1_SHIFT)) & FLEXSPI_IPEDCTX6IV1_CTX6_IV1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h24701 #define FLEXSPI_IPEDCTX6IV1_CTX6_IV1_MASK (0xFFFFFFFFU) macro
24704 …t32_t)(((uint32_t)(x)) << FLEXSPI_IPEDCTX6IV1_CTX6_IV1_SHIFT)) & FLEXSPI_IPEDCTX6IV1_CTX6_IV1_MASK)
DMCXN946_cm33_core1.h24701 #define FLEXSPI_IPEDCTX6IV1_CTX6_IV1_MASK (0xFFFFFFFFU) macro
24704 …t32_t)(((uint32_t)(x)) << FLEXSPI_IPEDCTX6IV1_CTX6_IV1_SHIFT)) & FLEXSPI_IPEDCTX6IV1_CTX6_IV1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/RW610/
DRW610.h35433 #define FLEXSPI_IPEDCTX6IV1_CTX6_IV1_MASK (0xFFFFFFFFU) macro
35436 …t32_t)(((uint32_t)(x)) << FLEXSPI_IPEDCTX6IV1_CTX6_IV1_SHIFT)) & FLEXSPI_IPEDCTX6IV1_CTX6_IV1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/RW612/
DRW612.h35433 #define FLEXSPI_IPEDCTX6IV1_CTX6_IV1_MASK (0xFFFFFFFFU) macro
35436 …t32_t)(((uint32_t)(x)) << FLEXSPI_IPEDCTX6IV1_CTX6_IV1_SHIFT)) & FLEXSPI_IPEDCTX6IV1_CTX6_IV1_MASK)