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Searched refs:FCLKDIV (Results 1 – 5 of 5) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/drivers/flash_ftmr/
Dfsl_flash.c418 …if ((0U == (FTMRx->FCLKDIV & FTMRx_FCLKDIV_FDIVLCK_MASK)) && (0U != (FTMRx->FSTAT & FTMRx_FSTAT_CC… in FLASH_Init()
421 …FTMRx->FCLKDIV = (uint8_t)(FTMRx->FCLKDIV & (~FTMRx_FCLKDIV_FDIV_MASK)) | FTMRx_FCLKDIV_FDIV(clkDi… in FLASH_Init()
422 if ((FTMRx->FCLKDIV & FTMRx_FCLKDIV_FDIV_MASK) != FTMRx_FCLKDIV_FDIV(clkDiver)) in FLASH_Init()
430 if ((FTMRx->FCLKDIV & FTMRx_FCLKDIV_FDIV_MASK) != FTMRx_FCLKDIV_FDIV(clkDiver)) in FLASH_Init()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z4/
DMKE04Z4.h2402 __IO uint8_t FCLKDIV; /**< Flash Clock Divider Register, offset: 0x3 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE02Z4/
DMKE02Z4.h2397 __IO uint8_t FCLKDIV; /**< Flash Clock Divider Register, offset: 0x0 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z1284/
DMKE04Z1284.h2425 __IO uint8_t FCLKDIV; /**< Flash Clock Divider Register, offset: 0x3 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE06Z4/
DMKE06Z4.h2425 __IO uint8_t FCLKDIV; /**< Flash Clock Divider Register, offset: 0x3 */ member