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Searched refs:EMVSIM_CTRL_TX_DMA_EN_MASK (Results 1 – 25 of 30) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A41A/
DK32L2A41A.h4383 #define EMVSIM_CTRL_TX_DMA_EN_MASK (0x100000U) macro
4389 … (((uint32_t)(((uint32_t)(x)) << EMVSIM_CTRL_TX_DMA_EN_SHIFT)) & EMVSIM_CTRL_TX_DMA_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A31A/
DK32L2A31A.h4383 #define EMVSIM_CTRL_TX_DMA_EN_MASK (0x100000U) macro
4389 … (((uint32_t)(((uint32_t)(x)) << EMVSIM_CTRL_TX_DMA_EN_SHIFT)) & EMVSIM_CTRL_TX_DMA_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm4.h5487 #define EMVSIM_CTRL_TX_DMA_EN_MASK (0x100000U) macro
5493 … (((uint32_t)(((uint32_t)(x)) << EMVSIM_CTRL_TX_DMA_EN_SHIFT)) & EMVSIM_CTRL_TX_DMA_EN_MASK)
DK32L3A60_cm0plus.h4540 #define EMVSIM_CTRL_TX_DMA_EN_MASK (0x100000U) macro
4546 … (((uint32_t)(((uint32_t)(x)) << EMVSIM_CTRL_TX_DMA_EN_SHIFT)) & EMVSIM_CTRL_TX_DMA_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK80F25615/
DMK80F25615.h8924 #define EMVSIM_CTRL_TX_DMA_EN_MASK (0x100000U) macro
8930 … (((uint32_t)(((uint32_t)(x)) << EMVSIM_CTRL_TX_DMA_EN_SHIFT)) & EMVSIM_CTRL_TX_DMA_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK82F25615/
DMK82F25615.h8918 #define EMVSIM_CTRL_TX_DMA_EN_MASK (0x100000U) macro
8924 … (((uint32_t)(((uint32_t)(x)) << EMVSIM_CTRL_TX_DMA_EN_SHIFT)) & EMVSIM_CTRL_TX_DMA_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h16003 #define EMVSIM_CTRL_TX_DMA_EN_MASK (0x100000U) macro
16009 … (((uint32_t)(((uint32_t)(x)) << EMVSIM_CTRL_TX_DMA_EN_SHIFT)) & EMVSIM_CTRL_TX_DMA_EN_MASK)
DMCXN546_cm33_core1.h16003 #define EMVSIM_CTRL_TX_DMA_EN_MASK (0x100000U) macro
16009 … (((uint32_t)(((uint32_t)(x)) << EMVSIM_CTRL_TX_DMA_EN_SHIFT)) & EMVSIM_CTRL_TX_DMA_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h16003 #define EMVSIM_CTRL_TX_DMA_EN_MASK (0x100000U) macro
16009 … (((uint32_t)(((uint32_t)(x)) << EMVSIM_CTRL_TX_DMA_EN_SHIFT)) & EMVSIM_CTRL_TX_DMA_EN_MASK)
DMCXN547_cm33_core1.h16003 #define EMVSIM_CTRL_TX_DMA_EN_MASK (0x100000U) macro
16009 … (((uint32_t)(((uint32_t)(x)) << EMVSIM_CTRL_TX_DMA_EN_SHIFT)) & EMVSIM_CTRL_TX_DMA_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h31204 #define EMVSIM_CTRL_TX_DMA_EN_MASK (0x100000U) macro
31210 … (((uint32_t)(((uint32_t)(x)) << EMVSIM_CTRL_TX_DMA_EN_SHIFT)) & EMVSIM_CTRL_TX_DMA_EN_MASK)
DMIMXRT1175_cm7.h31206 #define EMVSIM_CTRL_TX_DMA_EN_MASK (0x100000U) macro
31212 … (((uint32_t)(((uint32_t)(x)) << EMVSIM_CTRL_TX_DMA_EN_SHIFT)) & EMVSIM_CTRL_TX_DMA_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h30894 #define EMVSIM_CTRL_TX_DMA_EN_MASK (0x100000U) macro
30900 … (((uint32_t)(((uint32_t)(x)) << EMVSIM_CTRL_TX_DMA_EN_SHIFT)) & EMVSIM_CTRL_TX_DMA_EN_MASK)
DMIMXRT1165_cm4.h30892 #define EMVSIM_CTRL_TX_DMA_EN_MASK (0x100000U) macro
30898 … (((uint32_t)(((uint32_t)(x)) << EMVSIM_CTRL_TX_DMA_EN_SHIFT)) & EMVSIM_CTRL_TX_DMA_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h31206 #define EMVSIM_CTRL_TX_DMA_EN_MASK (0x100000U) macro
31212 … (((uint32_t)(((uint32_t)(x)) << EMVSIM_CTRL_TX_DMA_EN_SHIFT)) & EMVSIM_CTRL_TX_DMA_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h16049 #define EMVSIM_CTRL_TX_DMA_EN_MASK (0x100000U) macro
16055 … (((uint32_t)(((uint32_t)(x)) << EMVSIM_CTRL_TX_DMA_EN_SHIFT)) & EMVSIM_CTRL_TX_DMA_EN_MASK)
DMCXN947_cm33_core0.h16049 #define EMVSIM_CTRL_TX_DMA_EN_MASK (0x100000U) macro
16055 … (((uint32_t)(((uint32_t)(x)) << EMVSIM_CTRL_TX_DMA_EN_SHIFT)) & EMVSIM_CTRL_TX_DMA_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h16049 #define EMVSIM_CTRL_TX_DMA_EN_MASK (0x100000U) macro
16055 … (((uint32_t)(((uint32_t)(x)) << EMVSIM_CTRL_TX_DMA_EN_SHIFT)) & EMVSIM_CTRL_TX_DMA_EN_MASK)
DMCXN946_cm33_core1.h16049 #define EMVSIM_CTRL_TX_DMA_EN_MASK (0x100000U) macro
16055 … (((uint32_t)(((uint32_t)(x)) << EMVSIM_CTRL_TX_DMA_EN_SHIFT)) & EMVSIM_CTRL_TX_DMA_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_ca53.h23114 #define EMVSIM_CTRL_TX_DMA_EN_MASK (0x100000U) macro
23120 … (((uint32_t)(((uint32_t)(x)) << EMVSIM_CTRL_TX_DMA_EN_SHIFT)) & EMVSIM_CTRL_TX_DMA_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h32897 #define EMVSIM_CTRL_TX_DMA_EN_MASK (0x100000U) macro
32903 … (((uint32_t)(((uint32_t)(x)) << EMVSIM_CTRL_TX_DMA_EN_SHIFT)) & EMVSIM_CTRL_TX_DMA_EN_MASK)
DMIMXRT1166_cm7.h32899 #define EMVSIM_CTRL_TX_DMA_EN_MASK (0x100000U) macro
32905 … (((uint32_t)(((uint32_t)(x)) << EMVSIM_CTRL_TX_DMA_EN_SHIFT)) & EMVSIM_CTRL_TX_DMA_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h33206 #define EMVSIM_CTRL_TX_DMA_EN_MASK (0x100000U) macro
33212 … (((uint32_t)(((uint32_t)(x)) << EMVSIM_CTRL_TX_DMA_EN_SHIFT)) & EMVSIM_CTRL_TX_DMA_EN_MASK)
DMIMXRT1173_cm7.h33208 #define EMVSIM_CTRL_TX_DMA_EN_MASK (0x100000U) macro
33214 … (((uint32_t)(((uint32_t)(x)) << EMVSIM_CTRL_TX_DMA_EN_SHIFT)) & EMVSIM_CTRL_TX_DMA_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h33211 #define EMVSIM_CTRL_TX_DMA_EN_MASK (0x100000U) macro
33217 … (((uint32_t)(((uint32_t)(x)) << EMVSIM_CTRL_TX_DMA_EN_SHIFT)) & EMVSIM_CTRL_TX_DMA_EN_MASK)

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