| /hal_nxp-latest/mcux/mcux-sdk/drivers/smartcard/ |
| D | fsl_smartcard_emvsim.c | 161 …(base->CLKCFG & ~EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK) | EMVSIM_CLKCFG_GPCNT1_CLK_SEL(kEMVSIM_GPCRxCl… in smartcard_emvsim_StartSendData() 170 base->CLKCFG &= ~EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK; in smartcard_emvsim_StartSendData() 703 base->CLKCFG &= ~(EMVSIM_CLKCFG_GPCNT0_CLK_SEL_MASK | EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK); in SMARTCARD_EMVSIM_IRQHandler() 720 base->CLKCFG &= ~EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK; in SMARTCARD_EMVSIM_IRQHandler() 863 … base->CLKCFG &= ~(EMVSIM_CLKCFG_GPCNT0_CLK_SEL_MASK | EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK); in SMARTCARD_EMVSIM_IRQHandler() 869 … base->CLKCFG &= ~(EMVSIM_CLKCFG_GPCNT0_CLK_SEL_MASK | EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK); in SMARTCARD_EMVSIM_IRQHandler() 1007 base->CLKCFG &= ~EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK; in SMARTCARD_EMVSIM_Control()
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| D | fsl_smartcard_phy_emvsim.c | 142 emvsimBase->CLKCFG &= ~(EMVSIM_CLKCFG_GPCNT0_CLK_SEL_MASK | EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK); in SMARTCARD_PHY_Activate()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A41A/ |
| D | K32L2A41A.h | 4235 #define EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK (0x300U) macro 4243 …t32_t)(((uint32_t)(x)) << EMVSIM_CLKCFG_GPCNT1_CLK_SEL_SHIFT)) & EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A31A/ |
| D | K32L2A31A.h | 4235 #define EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK (0x300U) macro 4243 …t32_t)(((uint32_t)(x)) << EMVSIM_CLKCFG_GPCNT1_CLK_SEL_SHIFT)) & EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/ |
| D | K32L3A60_cm4.h | 5339 #define EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK (0x300U) macro 5347 …t32_t)(((uint32_t)(x)) << EMVSIM_CLKCFG_GPCNT1_CLK_SEL_SHIFT)) & EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK)
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| D | K32L3A60_cm0plus.h | 4392 #define EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK (0x300U) macro 4400 …t32_t)(((uint32_t)(x)) << EMVSIM_CLKCFG_GPCNT1_CLK_SEL_SHIFT)) & EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK80F25615/ |
| D | MK80F25615.h | 8794 #define EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK (0x300U) macro 8802 …t32_t)(((uint32_t)(x)) << EMVSIM_CLKCFG_GPCNT1_CLK_SEL_SHIFT)) & EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK82F25615/ |
| D | MK82F25615.h | 8788 #define EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK (0x300U) macro 8796 …t32_t)(((uint32_t)(x)) << EMVSIM_CLKCFG_GPCNT1_CLK_SEL_SHIFT)) & EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/ |
| D | MCXN546_cm33_core0.h | 15855 #define EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK (0x300U) macro 15863 …t32_t)(((uint32_t)(x)) << EMVSIM_CLKCFG_GPCNT1_CLK_SEL_SHIFT)) & EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK)
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| D | MCXN546_cm33_core1.h | 15855 #define EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK (0x300U) macro 15863 …t32_t)(((uint32_t)(x)) << EMVSIM_CLKCFG_GPCNT1_CLK_SEL_SHIFT)) & EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/ |
| D | MCXN547_cm33_core0.h | 15855 #define EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK (0x300U) macro 15863 …t32_t)(((uint32_t)(x)) << EMVSIM_CLKCFG_GPCNT1_CLK_SEL_SHIFT)) & EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK)
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| D | MCXN547_cm33_core1.h | 15855 #define EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK (0x300U) macro 15863 …t32_t)(((uint32_t)(x)) << EMVSIM_CLKCFG_GPCNT1_CLK_SEL_SHIFT)) & EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/ |
| D | MIMXRT1175_cm4.h | 31056 #define EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK (0x300U) macro 31064 …t32_t)(((uint32_t)(x)) << EMVSIM_CLKCFG_GPCNT1_CLK_SEL_SHIFT)) & EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK)
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| D | MIMXRT1175_cm7.h | 31058 #define EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK (0x300U) macro 31066 …t32_t)(((uint32_t)(x)) << EMVSIM_CLKCFG_GPCNT1_CLK_SEL_SHIFT)) & EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/ |
| D | MIMXRT1165_cm7.h | 30746 #define EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK (0x300U) macro 30754 …t32_t)(((uint32_t)(x)) << EMVSIM_CLKCFG_GPCNT1_CLK_SEL_SHIFT)) & EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK)
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| D | MIMXRT1165_cm4.h | 30744 #define EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK (0x300U) macro 30752 …t32_t)(((uint32_t)(x)) << EMVSIM_CLKCFG_GPCNT1_CLK_SEL_SHIFT)) & EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/ |
| D | MIMXRT1171.h | 31058 #define EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK (0x300U) macro 31066 …t32_t)(((uint32_t)(x)) << EMVSIM_CLKCFG_GPCNT1_CLK_SEL_SHIFT)) & EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/ |
| D | MCXN947_cm33_core1.h | 15901 #define EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK (0x300U) macro 15909 …t32_t)(((uint32_t)(x)) << EMVSIM_CLKCFG_GPCNT1_CLK_SEL_SHIFT)) & EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK)
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| D | MCXN947_cm33_core0.h | 15901 #define EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK (0x300U) macro 15909 …t32_t)(((uint32_t)(x)) << EMVSIM_CLKCFG_GPCNT1_CLK_SEL_SHIFT)) & EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/ |
| D | MCXN946_cm33_core0.h | 15901 #define EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK (0x300U) macro 15909 …t32_t)(((uint32_t)(x)) << EMVSIM_CLKCFG_GPCNT1_CLK_SEL_SHIFT)) & EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK)
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| D | MCXN946_cm33_core1.h | 15901 #define EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK (0x300U) macro 15909 …t32_t)(((uint32_t)(x)) << EMVSIM_CLKCFG_GPCNT1_CLK_SEL_SHIFT)) & EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/ |
| D | MIMX8QM6_ca53.h | 22966 #define EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK (0x300U) macro 22974 …t32_t)(((uint32_t)(x)) << EMVSIM_CLKCFG_GPCNT1_CLK_SEL_SHIFT)) & EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/ |
| D | MIMXRT1166_cm4.h | 32749 #define EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK (0x300U) macro 32757 …t32_t)(((uint32_t)(x)) << EMVSIM_CLKCFG_GPCNT1_CLK_SEL_SHIFT)) & EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/ |
| D | MIMXRT1173_cm4.h | 33058 #define EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK (0x300U) macro 33066 …t32_t)(((uint32_t)(x)) << EMVSIM_CLKCFG_GPCNT1_CLK_SEL_SHIFT)) & EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/ |
| D | MIMXRT1172.h | 33063 #define EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK (0x300U) macro 33071 …t32_t)(((uint32_t)(x)) << EMVSIM_CLKCFG_GPCNT1_CLK_SEL_SHIFT)) & EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK)
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