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Searched refs:EMVSIM1_IRQn (Results 1 – 25 of 30) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/boards/evkbmimxrt1170/
Dboard.h112 #define BOARD_SMARTCARD_MODULE_IRQ (EMVSIM1_IRQn) /*!< SMARTCARD communicational module …
/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1160/
Dboard.h140 #define BOARD_SMARTCARD_MODULE_IRQ (EMVSIM1_IRQn) /*!< SMARTCARD communicational module …
/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1170/
Dboard.h162 #define BOARD_SMARTCARD_MODULE_IRQ (EMVSIM1_IRQn) /*!< SMARTCARD communicational module …
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1171/
Dfsl_pm_device.h692 #define PM_WSID_EMVSIM1_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(EMVSIM1_IRQn) /*!< EM…
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1172/
Dfsl_pm_device.h692 #define PM_WSID_EMVSIM1_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(EMVSIM1_IRQn) /*!< EM…
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1173/
Dfsl_pm_device.h692 #define PM_WSID_EMVSIM1_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(EMVSIM1_IRQn) /*!< EM…
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1176/
Dfsl_pm_device.h692 #define PM_WSID_EMVSIM1_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(EMVSIM1_IRQn) /*!< EM…
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1175/
Dfsl_pm_device.h692 #define PM_WSID_EMVSIM1_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(EMVSIM1_IRQn) /*!< EM…
/hal_nxp-latest/mcux/mcux-sdk/devices/MK80F25615/
DMK80F25615.h168 EMVSIM1_IRQn = 38, /**< EMVSIM1 common interrupt */ enumerator
9457 #define EMVSIM_IRQS { EMVSIM0_IRQn, EMVSIM1_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MK82F25615/
DMK82F25615.h162 EMVSIM1_IRQn = 38, /**< EMVSIM1 common interrupt */ enumerator
9451 #define EMVSIM_IRQS { EMVSIM0_IRQn, EMVSIM1_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h186 EMVSIM1_IRQn = 104, /**< EMVSIM1 interrupt */ enumerator
16631 #define EMVSIM_IRQS { EMVSIM0_IRQn, EMVSIM1_IRQn }
DMCXN546_cm33_core1.h186 EMVSIM1_IRQn = 104, /**< EMVSIM1 interrupt */ enumerator
16631 #define EMVSIM_IRQS { EMVSIM0_IRQn, EMVSIM1_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h186 EMVSIM1_IRQn = 104, /**< EMVSIM1 interrupt */ enumerator
16631 #define EMVSIM_IRQS { EMVSIM0_IRQn, EMVSIM1_IRQn }
DMCXN547_cm33_core1.h186 EMVSIM1_IRQn = 104, /**< EMVSIM1 interrupt */ enumerator
16631 #define EMVSIM_IRQS { EMVSIM0_IRQn, EMVSIM1_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h300 EMVSIM1_IRQn = 204, /**< EMVSIM1 interrupt */ enumerator
31805 #define EMVSIM_IRQS { NotAvail_IRQn, EMVSIM1_IRQn, EMVSIM2_IRQn }
DMIMXRT1175_cm7.h300 EMVSIM1_IRQn = 204, /**< EMVSIM1 interrupt */ enumerator
31807 #define EMVSIM_IRQS { NotAvail_IRQn, EMVSIM1_IRQn, EMVSIM2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h298 EMVSIM1_IRQn = 204, /**< EMVSIM1 interrupt */ enumerator
31495 #define EMVSIM_IRQS { NotAvail_IRQn, EMVSIM1_IRQn, EMVSIM2_IRQn }
DMIMXRT1165_cm4.h298 EMVSIM1_IRQn = 204, /**< EMVSIM1 interrupt */ enumerator
31493 #define EMVSIM_IRQS { NotAvail_IRQn, EMVSIM1_IRQn, EMVSIM2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h300 EMVSIM1_IRQn = 204, /**< EMVSIM1 interrupt */ enumerator
31807 #define EMVSIM_IRQS { NotAvail_IRQn, EMVSIM1_IRQn, EMVSIM2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h186 EMVSIM1_IRQn = 104, /**< EMVSIM1 interrupt */ enumerator
16677 #define EMVSIM_IRQS { EMVSIM0_IRQn, EMVSIM1_IRQn }
DMCXN947_cm33_core0.h186 EMVSIM1_IRQn = 104, /**< EMVSIM1 interrupt */ enumerator
16677 #define EMVSIM_IRQS { EMVSIM0_IRQn, EMVSIM1_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h186 EMVSIM1_IRQn = 104, /**< EMVSIM1 interrupt */ enumerator
16677 #define EMVSIM_IRQS { EMVSIM0_IRQn, EMVSIM1_IRQn }
DMCXN946_cm33_core1.h186 EMVSIM1_IRQn = 104, /**< EMVSIM1 interrupt */ enumerator
16677 #define EMVSIM_IRQS { EMVSIM0_IRQn, EMVSIM1_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h298 EMVSIM1_IRQn = 204, /**< EMVSIM1 interrupt */ enumerator
33498 #define EMVSIM_IRQS { NotAvail_IRQn, EMVSIM1_IRQn, EMVSIM2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h297 EMVSIM1_IRQn = 204, /**< EMVSIM1 interrupt */ enumerator
33807 #define EMVSIM_IRQS { NotAvail_IRQn, EMVSIM1_IRQn, EMVSIM2_IRQn }

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