Searched refs:DPHYESCCLKSEL_OFFSET (Results 1 – 6 of 6) sorted by relevance
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/drivers/ |
| D | fsl_clock.h | 540 #define DPHYESCCLKSEL_OFFSET 0x778 macro
941 … kFRO_DIV1_to_MIPI_DPHYESC_CLK = CLKCTL0_TUPLE_MUXA(DPHYESCCLKSEL_OFFSET, 0), /*!< Attach FRO_DIV1
943 …kFRO_DIV16_to_MIPI_DPHYESC_CLK = CLKCTL0_TUPLE_MUXA(DPHYESCCLKSEL_OFFSET, 1), /*!< Attach FRO_DIV16
945 … kAUX0_PLL_to_MIPI_DPHYESC_CLK = CLKCTL0_TUPLE_MUXA(DPHYESCCLKSEL_OFFSET, 2), /*!< Attach AUX0_PLL
947 … kAUX1_PLL_to_MIPI_DPHYESC_CLK = CLKCTL0_TUPLE_MUXA(DPHYESCCLKSEL_OFFSET, 3), /*!< Attach AUX1_PLL
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/drivers/ |
| D | fsl_clock.h | 540 #define DPHYESCCLKSEL_OFFSET 0x778 macro
941 … kFRO_DIV1_to_MIPI_DPHYESC_CLK = CLKCTL0_TUPLE_MUXA(DPHYESCCLKSEL_OFFSET, 0), /*!< Attach FRO_DIV1
943 …kFRO_DIV16_to_MIPI_DPHYESC_CLK = CLKCTL0_TUPLE_MUXA(DPHYESCCLKSEL_OFFSET, 1), /*!< Attach FRO_DIV16
945 … kAUX0_PLL_to_MIPI_DPHYESC_CLK = CLKCTL0_TUPLE_MUXA(DPHYESCCLKSEL_OFFSET, 2), /*!< Attach AUX0_PLL
947 … kAUX1_PLL_to_MIPI_DPHYESC_CLK = CLKCTL0_TUPLE_MUXA(DPHYESCCLKSEL_OFFSET, 3), /*!< Attach AUX1_PLL
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/drivers/ |
| D | fsl_clock.h | 540 #define DPHYESCCLKSEL_OFFSET 0x778 macro
941 … kFRO_DIV1_to_MIPI_DPHYESC_CLK = CLKCTL0_TUPLE_MUXA(DPHYESCCLKSEL_OFFSET, 0), /*!< Attach FRO_DIV1
943 …kFRO_DIV16_to_MIPI_DPHYESC_CLK = CLKCTL0_TUPLE_MUXA(DPHYESCCLKSEL_OFFSET, 1), /*!< Attach FRO_DIV16
945 … kAUX0_PLL_to_MIPI_DPHYESC_CLK = CLKCTL0_TUPLE_MUXA(DPHYESCCLKSEL_OFFSET, 2), /*!< Attach AUX0_PLL
947 … kAUX1_PLL_to_MIPI_DPHYESC_CLK = CLKCTL0_TUPLE_MUXA(DPHYESCCLKSEL_OFFSET, 3), /*!< Attach AUX1_PLL
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/drivers/ |
| D | fsl_clock.h | 942 #define DPHYESCCLKSEL_OFFSET 0x308 macro
1644 …DPHYESCCLKSEL_OFFSET, 0), /*!< Attach Media VDD2 base clock to MIPI_DSI_Host DPHY Escape Mode Cloc…
1646 …DPHYESCCLKSEL_OFFSET, 1), /*!< Attach Main PLL PFD1 clock to MIPI_DSI_Host DPHY Escape Mode Clock.…
1648 … DPHYESCCLKSEL_OFFSET, 2), /*!< Attach FRO0 max clock to MIPI_DSI_Host DPHY Escape Mode Clock. */
1650 …DPHYESCCLKSEL_OFFSET, 3), /*!< Attach Audio PLL PFD2 clock to MIPI_DSI_Host DPHY Escape Mode Clock…
1652 …CLKCTL4_TUPLE_MUXA_NONE(DPHYESCCLKSEL_OFFSET, 0), /*!< Attach NONE to MIPI_DSI_Host DPHY Escape Mo…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/drivers/ |
| D | fsl_clock.h | 942 #define DPHYESCCLKSEL_OFFSET 0x308 macro
1644 …DPHYESCCLKSEL_OFFSET, 0), /*!< Attach Media VDD2 base clock to MIPI_DSI_Host DPHY Escape Mode Cloc…
1646 …DPHYESCCLKSEL_OFFSET, 1), /*!< Attach Main PLL PFD1 clock to MIPI_DSI_Host DPHY Escape Mode Clock.…
1648 … DPHYESCCLKSEL_OFFSET, 2), /*!< Attach FRO0 max clock to MIPI_DSI_Host DPHY Escape Mode Clock. */
1650 …DPHYESCCLKSEL_OFFSET, 3), /*!< Attach Audio PLL PFD2 clock to MIPI_DSI_Host DPHY Escape Mode Clock…
1652 …CLKCTL4_TUPLE_MUXA_NONE(DPHYESCCLKSEL_OFFSET, 0), /*!< Attach NONE to MIPI_DSI_Host DPHY Escape Mo…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/drivers/ |
| D | fsl_clock.h | 942 #define DPHYESCCLKSEL_OFFSET 0x308 macro
1644 …DPHYESCCLKSEL_OFFSET, 0), /*!< Attach Media VDD2 base clock to MIPI_DSI_Host DPHY Escape Mode Cloc…
1646 …DPHYESCCLKSEL_OFFSET, 1), /*!< Attach Main PLL PFD1 clock to MIPI_DSI_Host DPHY Escape Mode Clock.…
1648 … DPHYESCCLKSEL_OFFSET, 2), /*!< Attach FRO0 max clock to MIPI_DSI_Host DPHY Escape Mode Clock. */
1650 …DPHYESCCLKSEL_OFFSET, 3), /*!< Attach Audio PLL PFD2 clock to MIPI_DSI_Host DPHY Escape Mode Clock…
1652 …CLKCTL4_TUPLE_MUXA_NONE(DPHYESCCLKSEL_OFFSET, 0), /*!< Attach NONE to MIPI_DSI_Host DPHY Escape Mo…
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