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Searched refs:DPHYCLKSEL_OFFSET (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/drivers/
Dfsl_clock.h539 #define DPHYCLKSEL_OFFSET 0x770 macro
935 …kFRO_DIV1_to_MIPI_DPHY_CLK = CLKCTL0_TUPLE_MUXA(DPHYCLKSEL_OFFSET, 0), /*!< Attach FRO_DIV1 to MIP…
936 …kMAIN_PLL_to_MIPI_DPHY_CLK = CLKCTL0_TUPLE_MUXA(DPHYCLKSEL_OFFSET, 1), /*!< Attach MAIN_PLL to MIP…
937 …kAUX0_PLL_to_MIPI_DPHY_CLK = CLKCTL0_TUPLE_MUXA(DPHYCLKSEL_OFFSET, 2), /*!< Attach AUX0_PLL to MIP…
938 …kAUX1_PLL_to_MIPI_DPHY_CLK = CLKCTL0_TUPLE_MUXA(DPHYCLKSEL_OFFSET, 3), /*!< Attach AUX1_PLL to MIP…
939 …kNONE_to_MIPI_DPHY_CLK = CLKCTL0_TUPLE_MUXA(DPHYCLKSEL_OFFSET, 7), /*!< Attach NONE to MIPI_DP…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/drivers/
Dfsl_clock.h539 #define DPHYCLKSEL_OFFSET 0x770 macro
935 …kFRO_DIV1_to_MIPI_DPHY_CLK = CLKCTL0_TUPLE_MUXA(DPHYCLKSEL_OFFSET, 0), /*!< Attach FRO_DIV1 to MIP…
936 …kMAIN_PLL_to_MIPI_DPHY_CLK = CLKCTL0_TUPLE_MUXA(DPHYCLKSEL_OFFSET, 1), /*!< Attach MAIN_PLL to MIP…
937 …kAUX0_PLL_to_MIPI_DPHY_CLK = CLKCTL0_TUPLE_MUXA(DPHYCLKSEL_OFFSET, 2), /*!< Attach AUX0_PLL to MIP…
938 …kAUX1_PLL_to_MIPI_DPHY_CLK = CLKCTL0_TUPLE_MUXA(DPHYCLKSEL_OFFSET, 3), /*!< Attach AUX1_PLL to MIP…
939 …kNONE_to_MIPI_DPHY_CLK = CLKCTL0_TUPLE_MUXA(DPHYCLKSEL_OFFSET, 7), /*!< Attach NONE to MIPI_DP…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/drivers/
Dfsl_clock.h539 #define DPHYCLKSEL_OFFSET 0x770 macro
935 …kFRO_DIV1_to_MIPI_DPHY_CLK = CLKCTL0_TUPLE_MUXA(DPHYCLKSEL_OFFSET, 0), /*!< Attach FRO_DIV1 to MIP…
936 …kMAIN_PLL_to_MIPI_DPHY_CLK = CLKCTL0_TUPLE_MUXA(DPHYCLKSEL_OFFSET, 1), /*!< Attach MAIN_PLL to MIP…
937 …kAUX0_PLL_to_MIPI_DPHY_CLK = CLKCTL0_TUPLE_MUXA(DPHYCLKSEL_OFFSET, 2), /*!< Attach AUX0_PLL to MIP…
938 …kAUX1_PLL_to_MIPI_DPHY_CLK = CLKCTL0_TUPLE_MUXA(DPHYCLKSEL_OFFSET, 3), /*!< Attach AUX1_PLL to MIP…
939 …kNONE_to_MIPI_DPHY_CLK = CLKCTL0_TUPLE_MUXA(DPHYCLKSEL_OFFSET, 7), /*!< Attach NONE to MIPI_DP…