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Searched refs:DMA_MODE (Results 1 – 25 of 36) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k3/Eth_GMAC/src/
DGmac_Ip_Hw_Access.c639 if ((Base->DMA_MODE & GMAC_DMA_MODE_SWR_MASK) != 0U) in GMAC_GetPowerState()
705 Base->DMA_MODE |= GMAC_DMA_MODE_SWR_MASK; in GMAC_SetPowerState()
DGmac_Ip.c428 Base->DMA_MODE |= GMAC_DMA_MODE_SWR_MASK; in Gmac_Ip_InitDMA()
438 if ((Base->DMA_MODE & GMAC_DMA_MODE_SWR_MASK) == 0U) in Gmac_Ip_InitDMA()
450 Base->DMA_MODE = GMAC_DMA_MODE_INTM(1) | GMAC_DMA_MODE_DSPW(1); in Gmac_Ip_InitDMA()
455 Base->DMA_MODE &= ~GMAC_DMA_MODE_DSPW(1); in Gmac_Ip_InitDMA()
460 Base->DMA_MODE = GMAC_DMA_MODE_INTM(1); in Gmac_Ip_InitDMA()
1244 Base->DMA_MODE |= GMAC_DMA_MODE_SWR_MASK; in Gmac_Ip_Deinit()
/hal_nxp-latest/mcux/mcux-sdk/drivers/lpc_enet/
Dfsl_enet.c204 base->DMA_MODE |= ENET_DMA_MODE_SWR_MASK; in ENET_SetDMAControl()
205 while ((base->DMA_MODE & ENET_DMA_MODE_SWR_MASK) != 0U) in ENET_SetDMAControl()
615 base->DMA_MODE |= ENET_DMA_MODE_SWR_MASK; in ENET_Deinit()
616 while ((base->DMA_MODE & ENET_DMA_MODE_SWR_MASK) != 0U) in ENET_Deinit()
/hal_nxp-latest/mcux/mcux-sdk/drivers/mcx_enet/
Dfsl_enet.c205 base->DMA_MODE |= ENET_DMA_MODE_SWR_MASK; in ENET_SetDMAControl()
206 while ((base->DMA_MODE & ENET_DMA_MODE_SWR_MASK) != 0U) in ENET_SetDMAControl()
615 base->DMA_MODE |= ENET_DMA_MODE_SWR_MASK; in ENET_Deinit()
616 while ((base->DMA_MODE & ENET_DMA_MODE_SWR_MASK) != 0U) in ENET_Deinit()
/hal_nxp-latest/mcux/mcux-sdk/drivers/enet_qos/
Dfsl_enet_qos.c303 base->DMA_MODE |= ENET_QOS_DMA_MODE_SWR_MASK; in ENET_QOS_SetDMAControl()
327 while ((base->DMA_MODE & ENET_QOS_DMA_MODE_SWR_MASK) != 0U) in ENET_QOS_SetDMAControl()
1089 base->DMA_MODE |= ENET_QOS_DMA_MODE_SWR_MASK; in ENET_QOS_Deinit()
1090 while ((base->DMA_MODE & ENET_QOS_DMA_MODE_SWR_MASK) != 0U) in ENET_QOS_Deinit()
/hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/
DS32K344_EMAC.h366 __IO uint32_t DMA_MODE; /**< DMA Mode, offset: 0x1000 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54606/
DLPC54606.h5247 __IO uint32_t DMA_MODE; /**< DMA mode register, offset: 0x1000 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54016/
DLPC54016.h4758 __IO uint32_t DMA_MODE; /**< DMA mode register, offset: 0x1000 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54616/
DLPC54616.h5322 __IO uint32_t DMA_MODE; /**< DMA mode register, offset: 0x1000 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54018M/
DLPC54018M.h5114 __IO uint32_t DMA_MODE; /**< DMA mode register, offset: 0x1000 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54628/
DLPC54628.h5318 __IO uint32_t DMA_MODE; /**< DMA mode register, offset: 0x1000 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54618/
DLPC54618.h5320 __IO uint32_t DMA_MODE; /**< DMA mode register, offset: 0x1000 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S018/
DLPC54S018.h5522 __IO uint32_t DMA_MODE; /**< DMA mode register, offset: 0x1000 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54018/
DLPC54018.h5114 __IO uint32_t DMA_MODE; /**< DMA mode register, offset: 0x1000 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S016/
DLPC54S016.h5123 __IO uint32_t DMA_MODE; /**< DMA mode register, offset: 0x1000 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54608/
DLPC54608.h5243 __IO uint32_t DMA_MODE; /**< DMA mode register, offset: 0x1000 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S018M/
DLPC54S018M.h5522 __IO uint32_t DMA_MODE; /**< DMA mode register, offset: 0x1000 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h16742 __IO uint32_t DMA_MODE; /**< DMA Bus Mode, offset: 0x1000 */ member
DMCXN546_cm33_core1.h16742 __IO uint32_t DMA_MODE; /**< DMA Bus Mode, offset: 0x1000 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h16742 __IO uint32_t DMA_MODE; /**< DMA Bus Mode, offset: 0x1000 */ member
DMCXN547_cm33_core1.h16742 __IO uint32_t DMA_MODE; /**< DMA Bus Mode, offset: 0x1000 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h16788 __IO uint32_t DMA_MODE; /**< DMA Bus Mode, offset: 0x1000 */ member
DMCXN947_cm33_core0.h16788 __IO uint32_t DMA_MODE; /**< DMA Bus Mode, offset: 0x1000 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h16788 __IO uint32_t DMA_MODE; /**< DMA Bus Mode, offset: 0x1000 */ member
DMCXN946_cm33_core1.h16788 __IO uint32_t DMA_MODE; /**< DMA Bus Mode, offset: 0x1000 */ member

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