| /hal_nxp-latest/mcux/mcux-sdk/drivers/dma3/ |
| D | fsl_ad_edma.c | 238 base->CH[channel].CH_CSR |= DMA_CH_CSR_DONE_MASK; in EDMA_AD_ResetChannel() 401 …base->CH[channel].CH_CSR = (base->CH[channel].CH_CSR & (~DMA_CH_CSR_DONE_MASK)) | DMA_CH_CSR_EEI_M… in EDMA_AD_EnableChannelInterrupts() 426 …base->CH[channel].CH_CSR = (base->CH[channel].CH_CSR & (~DMA_CH_CSR_DONE_MASK)) & ~DMA_CH_CSR_EEI_… in EDMA_AD_DisableChannelInterrupts() 738 if ((DMA_CH_CSR_DONE_MASK & base->CH[channel].CH_CSR) != 0U) in EDMA_AD_GetRemainingMajorLoopCount() 775 retval |= ((base->CH[channel].CH_CSR & DMA_CH_CSR_DONE_MASK) >> DMA_CH_CSR_DONE_SHIFT); in EDMA_AD_GetChannelStatusFlags() 799 base->CH[channel].CH_CSR |= DMA_CH_CSR_DONE_MASK; in EDMA_AD_ClearChannelStatusFlags() 1245 … (handle->base->CH[handle->channel].CH_CSR & (~DMA_CH_CSR_DONE_MASK)) | DMA_CH_CSR_ERQ_MASK; in EDMA_AD_SubmitTransfer() 1268 … (handle->base->CH[handle->channel].CH_CSR & (~DMA_CH_CSR_DONE_MASK)) | DMA_CH_CSR_ERQ_MASK; in EDMA_AD_StartTransfer() 1286 if ((!((handle->base->CH[handle->channel].CH_CSR & DMA_CH_CSR_DONE_MASK) != 0U)) || in EDMA_AD_StartTransfer() 1296 … (handle->base->CH[handle->channel].CH_CSR & (~DMA_CH_CSR_DONE_MASK)) | DMA_CH_CSR_ERQ_MASK; in EDMA_AD_StartTransfer() [all …]
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| D | fsl_edma.c | 269 base->CH[channel].CH_CSR |= DMA_CH_CSR_DONE_MASK; in EDMA_ResetChannel() 429 …base->CH[channel].CH_CSR = (base->CH[channel].CH_CSR & (~DMA_CH_CSR_DONE_MASK)) | DMA_CH_CSR_EEI_M… in EDMA_EnableChannelInterrupts() 454 …base->CH[channel].CH_CSR = (base->CH[channel].CH_CSR & (~DMA_CH_CSR_DONE_MASK)) & ~DMA_CH_CSR_EEI_… in EDMA_DisableChannelInterrupts() 766 if ((DMA_CH_CSR_DONE_MASK & base->CH[channel].CH_CSR) != 0U) in EDMA_GetRemainingMajorLoopCount() 803 retval |= ((base->CH[channel].CH_CSR & DMA_CH_CSR_DONE_MASK) >> DMA_CH_CSR_DONE_SHIFT); in EDMA_GetChannelStatusFlags() 827 base->CH[channel].CH_CSR |= DMA_CH_CSR_DONE_MASK; in EDMA_ClearChannelStatusFlags() 1286 … (handle->base->CH[handle->channel].CH_CSR & (~DMA_CH_CSR_DONE_MASK)) | DMA_CH_CSR_ERQ_MASK; in EDMA_SubmitTransfer() 1309 … (handle->base->CH[handle->channel].CH_CSR & (~DMA_CH_CSR_DONE_MASK)) | DMA_CH_CSR_ERQ_MASK; in EDMA_StartTransfer() 1332 if ((!((handle->base->CH[handle->channel].CH_CSR & DMA_CH_CSR_DONE_MASK) != 0U)) || in EDMA_StartTransfer() 1342 … (handle->base->CH[handle->channel].CH_CSR & (~DMA_CH_CSR_DONE_MASK)) | DMA_CH_CSR_ERQ_MASK; in EDMA_StartTransfer() [all …]
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| D | fsl_ad_edma.h | 517 …(base->CH[channel].CH_CSR & (~(DMA_CH_CSR_EARQ_MASK | DMA_CH_CSR_DONE_MASK))) | DMA_CH_CSR_EARQ(en… in EDMA_AD_EnableAsyncRequest()
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| D | fsl_edma.h | 518 …(base->CH[channel].CH_CSR & (~(DMA_CH_CSR_EARQ_MASK | DMA_CH_CSR_DONE_MASK))) | DMA_CH_CSR_EARQ(en… in EDMA_EnableAsyncRequest()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/edma4/ |
| D | fsl_edma_core.h | 115 …CLEAR_DONE_STATUS(base, channel) (EDMA_CHANNEL_BASE(base, channel)->CH_CSR |= DMA_CH_CSR_DONE_MASK) 117 ((EDMA_CHANNEL_BASE(base, channel)->CH_CSR & DMA_CH_CSR_DONE_MASK) >> DMA_CH_CSR_DONE_SHIFT)
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| D | fsl_edma.c | 2414 if ((!((handle->channelBase->CH_CSR & DMA_CH_CSR_DONE_MASK) != 0U)) || in EDMA_StartTransfer() 2442 …handle->channelBase->CH_CSR = handle->channelBase->CH_CSR & (~(DMA_CH_CSR_DONE_MASK | DMA_CH_CSR_E… in EDMA_StopTransfer() 2511 transfer_done = (bool)(handle->channelBase->CH_CSR & DMA_CH_CSR_DONE_MASK); in EDMA_HandleIRQ() 2594 handle->channelBase->CH_CSR |= DMA_CH_CSR_DONE_MASK; in EDMA_HandleIRQ() 2625 handle->channelBase->CH_CSR |= DMA_CH_CSR_DONE_MASK; in EDMA_HandleIRQ()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX9352/drivers/edma4/ |
| D | fsl_edma_core.h | 115 …CLEAR_DONE_STATUS(base, channel) (EDMA_CHANNEL_BASE(base, channel)->CH_CSR |= DMA_CH_CSR_DONE_MASK) 117 ((EDMA_CHANNEL_BASE(base, channel)->CH_CSR & DMA_CH_CSR_DONE_MASK) >> DMA_CH_CSR_DONE_SHIFT)
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| D | fsl_edma.c | 2421 if ((!((handle->channelBase->CH_CSR & DMA_CH_CSR_DONE_MASK) != 0U)) || in EDMA_StartTransfer() 2449 …handle->channelBase->CH_CSR = handle->channelBase->CH_CSR & (~(DMA_CH_CSR_DONE_MASK | DMA_CH_CSR_E… in EDMA_StopTransfer() 2518 transfer_done = (bool)(handle->channelBase->CH_CSR & DMA_CH_CSR_DONE_MASK); in EDMA_HandleIRQ() 2601 handle->channelBase->CH_CSR |= DMA_CH_CSR_DONE_MASK; in EDMA_HandleIRQ() 2632 handle->channelBase->CH_CSR |= DMA_CH_CSR_DONE_MASK; in EDMA_HandleIRQ()
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| /hal_nxp-latest/s32/mcux/devices/S32K344/ |
| D | S32K344_device.h | 2592 #define DMA_CH_CSR_DONE_MASK DMA_TCD_CH0_CSR_DONE_MASK macro
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| /hal_nxp-latest/s32/mcux/devices/S32Z270/ |
| D | S32Z270_device.h | 2111 #define DMA_CH_CSR_DONE_MASK EDMA3_TCD_CH_CSR_DONE_MASK macro
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/ |
| D | MCXA142.h | 4205 #define DMA_CH_CSR_DONE_MASK (0x40000000U) macro 4208 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_DONE_SHIFT)) & DMA_CH_CSR_DONE_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/ |
| D | MCXA143.h | 4205 #define DMA_CH_CSR_DONE_MASK (0x40000000U) macro 4208 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_DONE_SHIFT)) & DMA_CH_CSR_DONE_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/ |
| D | MCXA153.h | 4205 #define DMA_CH_CSR_DONE_MASK (0x40000000U) macro 4208 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_DONE_SHIFT)) & DMA_CH_CSR_DONE_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/ |
| D | MCXA152.h | 4205 #define DMA_CH_CSR_DONE_MASK (0x40000000U) macro 4208 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_DONE_SHIFT)) & DMA_CH_CSR_DONE_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/ |
| D | MCXA146.h | 6416 #define DMA_CH_CSR_DONE_MASK (0x40000000U) macro 6419 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_DONE_SHIFT)) & DMA_CH_CSR_DONE_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/ |
| D | MCXA145.h | 6416 #define DMA_CH_CSR_DONE_MASK (0x40000000U) macro 6419 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_DONE_SHIFT)) & DMA_CH_CSR_DONE_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/ |
| D | MCXA144.h | 6416 #define DMA_CH_CSR_DONE_MASK (0x40000000U) macro 6419 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_DONE_SHIFT)) & DMA_CH_CSR_DONE_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/ |
| D | MCXA156.h | 6416 #define DMA_CH_CSR_DONE_MASK (0x40000000U) macro 6419 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_DONE_SHIFT)) & DMA_CH_CSR_DONE_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/ |
| D | MCXA154.h | 6416 #define DMA_CH_CSR_DONE_MASK (0x40000000U) macro 6419 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_DONE_SHIFT)) & DMA_CH_CSR_DONE_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/ |
| D | MCXA155.h | 6416 #define DMA_CH_CSR_DONE_MASK (0x40000000U) macro 6419 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_DONE_SHIFT)) & DMA_CH_CSR_DONE_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/ |
| D | MCXW716A.h | 7171 #define DMA_CH_CSR_DONE_MASK (0x40000000U) macro 7174 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_DONE_SHIFT)) & DMA_CH_CSR_DONE_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/ |
| D | MIMXRT735S_hifi1.h | 17954 #define DMA_CH_CSR_DONE_MASK (0x40000000U) macro 17957 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_DONE_SHIFT)) & DMA_CH_CSR_DONE_MASK)
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| D | MIMXRT735S_cm33_core1.h | 17992 #define DMA_CH_CSR_DONE_MASK (0x40000000U) macro 17995 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_DONE_SHIFT)) & DMA_CH_CSR_DONE_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/ |
| D | MCXW716C.h | 9340 #define DMA_CH_CSR_DONE_MASK (0x40000000U) macro 9343 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_DONE_SHIFT)) & DMA_CH_CSR_DONE_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/ |
| D | MIMXRT758S_cm33_core1.h | 17992 #define DMA_CH_CSR_DONE_MASK (0x40000000U) macro 17995 … (((uint32_t)(((uint32_t)(x)) << DMA_CH_CSR_DONE_SHIFT)) & DMA_CH_CSR_DONE_MASK)
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