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Searched refs:DMA_CHX_CTRL (Results 1 – 25 of 33) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/lpc_enet/
Dfsl_enet.c217 base->DMA_CH[index].DMA_CHX_CTRL = burstLen & ENET_DMA_CH_DMA_CHX_CTRL_PBLx8_MASK; in ENET_SetDMAControl()
914 …pbl = ((base->DMA_CH[count].DMA_CHX_CTRL & ENET_DMA_CH_DMA_CHX_CTRL_PBLx8_MASK) != 0U) ? (8U * pbl… in ENET_CreateHandler()
/hal_nxp-latest/mcux/mcux-sdk/drivers/mcx_enet/
Dfsl_enet.c218 base->DMA_CH[index].DMA_CHX_CTRL = burstLen & ENET_DMA_CH_DMA_CHX_CTRL_PBLx8_MASK; in ENET_SetDMAControl()
914 …pbl = ((base->DMA_CH[count].DMA_CHX_CTRL & ENET_DMA_CH_DMA_CHX_CTRL_PBLx8_MASK) != 0U) ? (8U * pbl… in ENET_CreateHandler()
/hal_nxp-latest/mcux/mcux-sdk/drivers/enet_qos/
Dfsl_enet_qos.c339 base->DMA_CH[index].DMA_CHX_CTRL = burstLen & ENET_QOS_DMA_CHX_CTRL_PBLx8_MASK; in ENET_QOS_SetDMAControl()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54606/
DLPC54606.h5253 …__IO uint32_t DMA_CHX_CTRL; /**< DMA Channelx Control, array offset: 0x1100, … member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54016/
DLPC54016.h4764 …__IO uint32_t DMA_CHX_CTRL; /**< DMA Channelx Control, array offset: 0x1100, … member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54616/
DLPC54616.h5328 …__IO uint32_t DMA_CHX_CTRL; /**< DMA Channelx Control, array offset: 0x1100, … member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54018M/
DLPC54018M.h5120 …__IO uint32_t DMA_CHX_CTRL; /**< DMA Channelx Control, array offset: 0x1100, … member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54628/
DLPC54628.h5324 …__IO uint32_t DMA_CHX_CTRL; /**< DMA Channelx Control, array offset: 0x1100, … member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54618/
DLPC54618.h5326 …__IO uint32_t DMA_CHX_CTRL; /**< DMA Channelx Control, array offset: 0x1100, … member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S018/
DLPC54S018.h5528 …__IO uint32_t DMA_CHX_CTRL; /**< DMA Channelx Control, array offset: 0x1100, … member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54018/
DLPC54018.h5120 …__IO uint32_t DMA_CHX_CTRL; /**< DMA Channelx Control, array offset: 0x1100, … member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S016/
DLPC54S016.h5129 …__IO uint32_t DMA_CHX_CTRL; /**< DMA Channelx Control, array offset: 0x1100, … member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54608/
DLPC54608.h5249 …__IO uint32_t DMA_CHX_CTRL; /**< DMA Channelx Control, array offset: 0x1100, … member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S018M/
DLPC54S018M.h5528 …__IO uint32_t DMA_CHX_CTRL; /**< DMA Channelx Control, array offset: 0x1100, … member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h16748 …__IO uint32_t DMA_CHX_CTRL; /**< DMA Channel 0 Control..DMA Channel 1 Control… member
DMCXN546_cm33_core1.h16748 …__IO uint32_t DMA_CHX_CTRL; /**< DMA Channel 0 Control..DMA Channel 1 Control… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h16748 …__IO uint32_t DMA_CHX_CTRL; /**< DMA Channel 0 Control..DMA Channel 1 Control… member
DMCXN547_cm33_core1.h16748 …__IO uint32_t DMA_CHX_CTRL; /**< DMA Channel 0 Control..DMA Channel 1 Control… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h16794 …__IO uint32_t DMA_CHX_CTRL; /**< DMA Channel 0 Control..DMA Channel 1 Control… member
DMCXN947_cm33_core0.h16794 …__IO uint32_t DMA_CHX_CTRL; /**< DMA Channel 0 Control..DMA Channel 1 Control… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h16794 …__IO uint32_t DMA_CHX_CTRL; /**< DMA Channel 0 Control..DMA Channel 1 Control… member
DMCXN946_cm33_core1.h16794 …__IO uint32_t DMA_CHX_CTRL; /**< DMA Channel 0 Control..DMA Channel 1 Control… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h36967 …__IO uint32_t DMA_CHX_CTRL; /**< DMA Channel 0 Control..DMA Channel 4 Control… member
DMIMXRT1176_cm4.h36965 …__IO uint32_t DMA_CHX_CTRL; /**< DMA Channel 0 Control..DMA Channel 4 Control… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML6/
DMIMX8ML6_cm7.h34056 …__IO uint32_t DMA_CHX_CTRL; /**< DMA Channel 0 Control..DMA Channel 4 Control… member

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