| /hal_nxp-latest/mcux/mcux-sdk/drivers/smartcard/ |
| D | fsl_smartcard_emvsim.c | 264 … base->DIVISOR = (((uint32_t)context->cardParams.Fi / context->cardParams.currentD) & 0x1FFu); in smartcard_emvsim_SetTransferType()
435 base->DIVISOR = 372u; in SMARTCARD_EMVSIM_Init()
1083 … base->DIVISOR = (((uint32_t)context->cardParams.Fi / context->cardParams.currentD) & 0x1FFu); in SMARTCARD_EMVSIM_Control()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A31A/ |
| D | K32L2A31A.h | 4175 __IO uint32_t DIVISOR; /**< Baud Rate Divisor Register, offset: 0xC */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A41A/ |
| D | K32L2A41A.h | 4175 __IO uint32_t DIVISOR; /**< Baud Rate Divisor Register, offset: 0xC */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/ |
| D | K32L3A60_cm4.h | 5279 __IO uint32_t DIVISOR; /**< Baud Rate Divisor Register, offset: 0xC */ member
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| D | K32L3A60_cm0plus.h | 4332 __IO uint32_t DIVISOR; /**< Baud Rate Divisor Register, offset: 0xC */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK80F25615/ |
| D | MK80F25615.h | 8742 __IO uint32_t DIVISOR; /**< Baud Rate Divisor Register, offset: 0xC */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK82F25615/ |
| D | MK82F25615.h | 8736 __IO uint32_t DIVISOR; /**< Baud Rate Divisor Register, offset: 0xC */ member
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| /hal_nxp-latest/imx/devices/MCIMX7D/ |
| D | MCIMX7D_M4.h | 17270 __IO uint32_t DIVISOR; /**< SIM Divisor Register, offset: 0x5C */ member
17311 #define SIM_DIVISOR_REG(base) ((base)->DIVISOR)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/ |
| D | MIMXRT1165_cm4.h | 30686 __IO uint32_t DIVISOR; /**< Baud Rate Divisor Register, offset: 0xC */ member
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| D | MIMXRT1165_cm7.h | 30688 __IO uint32_t DIVISOR; /**< Baud Rate Divisor Register, offset: 0xC */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/ |
| D | MIMXRT1171.h | 31000 __IO uint32_t DIVISOR; /**< Baud Rate Divisor Register, offset: 0xC */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/ |
| D | MIMX8QM6_ca53.h | 22906 __IO uint32_t DIVISOR; /**< Baud Rate Divisor Register, offset: 0xC */ member
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| D | MIMX8QM6_dsp.h | 23406 __IO uint32_t DIVISOR; /**< Baud Rate Divisor Register, offset: 0xC */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/ |
| D | MCXN546_cm33_core1.h | 15797 __IO uint32_t DIVISOR; /**< Baud Rate Divisor, offset: 0xC */ member
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| D | MCXN546_cm33_core0.h | 15797 __IO uint32_t DIVISOR; /**< Baud Rate Divisor, offset: 0xC */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/ |
| D | MCXN946_cm33_core0.h | 15843 __IO uint32_t DIVISOR; /**< Baud Rate Divisor, offset: 0xC */ member
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| D | MCXN946_cm33_core1.h | 15843 __IO uint32_t DIVISOR; /**< Baud Rate Divisor, offset: 0xC */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/ |
| D | MIMXRT1175_cm4.h | 30998 __IO uint32_t DIVISOR; /**< Baud Rate Divisor Register, offset: 0xC */ member
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| D | MIMXRT1175_cm7.h | 31000 __IO uint32_t DIVISOR; /**< Baud Rate Divisor Register, offset: 0xC */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/ |
| D | MCXN547_cm33_core1.h | 15797 __IO uint32_t DIVISOR; /**< Baud Rate Divisor, offset: 0xC */ member
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| D | MCXN547_cm33_core0.h | 15797 __IO uint32_t DIVISOR; /**< Baud Rate Divisor, offset: 0xC */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/ |
| D | MCXN947_cm33_core1.h | 15843 __IO uint32_t DIVISOR; /**< Baud Rate Divisor, offset: 0xC */ member
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| D | MCXN947_cm33_core0.h | 15843 __IO uint32_t DIVISOR; /**< Baud Rate Divisor, offset: 0xC */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/ |
| D | MIMXRT1173_cm7.h | 33002 __IO uint32_t DIVISOR; /**< Baud Rate Divisor Register, offset: 0xC */ member
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| D | MIMXRT1173_cm4.h | 33000 __IO uint32_t DIVISOR; /**< Baud Rate Divisor Register, offset: 0xC */ member
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