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Searched refs:DIGTMP_PPR_TPID4_MASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h11973 #define DIGTMP_PPR_TPID4_MASK (0x100000U) macro
11979 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PPR_TPID4_SHIFT)) & DIGTMP_PPR_TPID4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h11943 #define DIGTMP_PPR_TPID4_MASK (0x100000U) macro
11949 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PPR_TPID4_SHIFT)) & DIGTMP_PPR_TPID4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h14257 #define DIGTMP_PPR_TPID4_MASK (0x100000U) macro
14263 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PPR_TPID4_SHIFT)) & DIGTMP_PPR_TPID4_MASK)
DMCXN546_cm33_core1.h14257 #define DIGTMP_PPR_TPID4_MASK (0x100000U) macro
14263 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PPR_TPID4_SHIFT)) & DIGTMP_PPR_TPID4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h14257 #define DIGTMP_PPR_TPID4_MASK (0x100000U) macro
14263 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PPR_TPID4_SHIFT)) & DIGTMP_PPR_TPID4_MASK)
DMCXN547_cm33_core1.h14257 #define DIGTMP_PPR_TPID4_MASK (0x100000U) macro
14263 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PPR_TPID4_SHIFT)) & DIGTMP_PPR_TPID4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h14303 #define DIGTMP_PPR_TPID4_MASK (0x100000U) macro
14309 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PPR_TPID4_SHIFT)) & DIGTMP_PPR_TPID4_MASK)
DMCXN947_cm33_core0.h14303 #define DIGTMP_PPR_TPID4_MASK (0x100000U) macro
14309 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PPR_TPID4_SHIFT)) & DIGTMP_PPR_TPID4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h14303 #define DIGTMP_PPR_TPID4_MASK (0x100000U) macro
14309 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PPR_TPID4_SHIFT)) & DIGTMP_PPR_TPID4_MASK)
DMCXN946_cm33_core1.h14303 #define DIGTMP_PPR_TPID4_MASK (0x100000U) macro
14309 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PPR_TPID4_SHIFT)) & DIGTMP_PPR_TPID4_MASK)