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Searched refs:DIGTMP_PDR_TPOD7_MASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h11865 #define DIGTMP_PDR_TPOD7_MASK (0x800000U) macro
11871 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PDR_TPOD7_SHIFT)) & DIGTMP_PDR_TPOD7_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h11835 #define DIGTMP_PDR_TPOD7_MASK (0x800000U) macro
11841 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PDR_TPOD7_SHIFT)) & DIGTMP_PDR_TPOD7_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h14149 #define DIGTMP_PDR_TPOD7_MASK (0x800000U) macro
14155 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PDR_TPOD7_SHIFT)) & DIGTMP_PDR_TPOD7_MASK)
DMCXN546_cm33_core1.h14149 #define DIGTMP_PDR_TPOD7_MASK (0x800000U) macro
14155 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PDR_TPOD7_SHIFT)) & DIGTMP_PDR_TPOD7_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h14149 #define DIGTMP_PDR_TPOD7_MASK (0x800000U) macro
14155 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PDR_TPOD7_SHIFT)) & DIGTMP_PDR_TPOD7_MASK)
DMCXN547_cm33_core1.h14149 #define DIGTMP_PDR_TPOD7_MASK (0x800000U) macro
14155 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PDR_TPOD7_SHIFT)) & DIGTMP_PDR_TPOD7_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h14195 #define DIGTMP_PDR_TPOD7_MASK (0x800000U) macro
14201 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PDR_TPOD7_SHIFT)) & DIGTMP_PDR_TPOD7_MASK)
DMCXN947_cm33_core0.h14195 #define DIGTMP_PDR_TPOD7_MASK (0x800000U) macro
14201 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PDR_TPOD7_SHIFT)) & DIGTMP_PDR_TPOD7_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h14195 #define DIGTMP_PDR_TPOD7_MASK (0x800000U) macro
14201 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PDR_TPOD7_SHIFT)) & DIGTMP_PDR_TPOD7_MASK)
DMCXN946_cm33_core1.h14195 #define DIGTMP_PDR_TPOD7_MASK (0x800000U) macro
14201 … (((uint32_t)(((uint32_t)(x)) << DIGTMP_PDR_TPOD7_SHIFT)) & DIGTMP_PDR_TPOD7_MASK)