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Searched refs:DCDC_REG3_VDD1P0CTRL_DISABLE_STEP (Results 1 – 18 of 18) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h26175 #define DCDC_REG3_VDD1P0CTRL_DISABLE_STEP(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_VDD1P0CT… macro
DMIMXRT1175_cm7.h26178 #define DCDC_REG3_VDD1P0CTRL_DISABLE_STEP(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_VDD1P0CT… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h25866 #define DCDC_REG3_VDD1P0CTRL_DISABLE_STEP(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_VDD1P0CT… macro
DMIMXRT1165_cm4.h25863 #define DCDC_REG3_VDD1P0CTRL_DISABLE_STEP(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_VDD1P0CT… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h26178 #define DCDC_REG3_VDD1P0CTRL_DISABLE_STEP(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_VDD1P0CT… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h27868 #define DCDC_REG3_VDD1P0CTRL_DISABLE_STEP(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_VDD1P0CT… macro
DMIMXRT1166_cm7.h27871 #define DCDC_REG3_VDD1P0CTRL_DISABLE_STEP(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_VDD1P0CT… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h28177 #define DCDC_REG3_VDD1P0CTRL_DISABLE_STEP(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_VDD1P0CT… macro
DMIMXRT1173_cm7.h28180 #define DCDC_REG3_VDD1P0CTRL_DISABLE_STEP(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_VDD1P0CT… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h28183 #define DCDC_REG3_VDD1P0CTRL_DISABLE_STEP(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_VDD1P0CT… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h28185 #define DCDC_REG3_VDD1P0CTRL_DISABLE_STEP(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_VDD1P0CT… macro
DMIMXRT1176_cm4.h28182 #define DCDC_REG3_VDD1P0CTRL_DISABLE_STEP(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_VDD1P0CT… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1182/
DMIMXRT1182.h27476 #define DCDC_REG3_VDD1P0CTRL_DISABLE_STEP(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_VDD1P0CT… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1181/
DMIMXRT1181.h27476 #define DCDC_REG3_VDD1P0CTRL_DISABLE_STEP(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_VDD1P0CT… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1187/
DMIMXRT1187_cm33.h27591 #define DCDC_REG3_VDD1P0CTRL_DISABLE_STEP(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_VDD1P0CT… macro
DMIMXRT1187_cm7.h27120 #define DCDC_REG3_VDD1P0CTRL_DISABLE_STEP(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_VDD1P0CT… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1189/
DMIMXRT1189_cm33.h27590 #define DCDC_REG3_VDD1P0CTRL_DISABLE_STEP(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_VDD1P0CT… macro
DMIMXRT1189_cm7.h27119 #define DCDC_REG3_VDD1P0CTRL_DISABLE_STEP(x) (((uint32_t)(((uint32_t)(x)) << DCDC_REG3_VDD1P0CT… macro