Searched refs:CurrentTxFifoSlot (Results 1 – 2 of 2) sorted by relevance
342 if (State->CurrentTxFifoSlot > (State->ExpectedFifoWrites - State->TxIndex)) in Spi_Ip_TransferProcess()344 State->CurrentTxFifoSlot = State->ExpectedFifoWrites - State->TxIndex; in Spi_Ip_TransferProcess()346 if(State->CurrentTxFifoSlot != 0u) in Spi_Ip_TransferProcess()348 Spi_Ip_WriteTxFifo(State->CurrentTxFifoSlot, Instance); in Spi_Ip_TransferProcess()350 State->CurrentTxFifoSlot = 0u; in Spi_Ip_TransferProcess()1227 State->CurrentTxFifoSlot += LimitedNumberOfReads * 2u; in Spi_Ip_ReceiveData()1231 State->CurrentTxFifoSlot += LimitedNumberOfReads; in Spi_Ip_ReceiveData()1294 if (State->CurrentTxFifoSlot > RemainingWrites) in Spi_Ip_AsyncStart()1296 State->CurrentTxFifoSlot = RemainingWrites; in Spi_Ip_AsyncStart()1298 if (State->CurrentTxFifoSlot != 0u) in Spi_Ip_AsyncStart()[all …]
236 uint16 CurrentTxFifoSlot; /**< Number of TX FIFO slots are current available. */ member
