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Searched refs:CTRL_2 (Results 1 – 25 of 78) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/pdm/
Dfsl_pdm.c219 uint32_t osr = (base->CTRL_2 & PDM_CTRL_2_CICOSR_MASK) >> PDM_CTRL_2_CICOSR_SHIFT; in PDM_SetSampleRateConfig()
222 … (pdm_df_quality_mode_t)(uint32_t)((base->CTRL_2 & PDM_CTRL_2_QSEL_MASK) >> PDM_CTRL_2_QSEL_SHIFT); in PDM_SetSampleRateConfig()
246 base->CTRL_2 = (base->CTRL_2 & (~PDM_CTRL_2_CLKDIV_MASK)) | PDM_CTRL_2_CLKDIV(regDiv); in PDM_SetSampleRateConfig()
295 base->CTRL_2 = (base->CTRL_2 & (~PDM_CTRL_2_CLKDIV_MASK)) | PDM_CTRL_2_CLKDIV(regDiv); in PDM_SetSampleRate()
343 base->CTRL_2 = (base->CTRL_2 & (~(PDM_CTRL_2_CICOSR_MASK | PDM_CTRL_2_QSEL_MASK))) | in PDM_Init()
347 …base->CTRL_2 = (base->CTRL_2 & ~PDM_CTRL_2_DEC_BYPASS_MASK) | PDM_CTRL_2_DEC_BYPASS(config->enable… in PDM_Init()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN5/
DMIMX8MN5_cm7.h42369 __IO uint32_t CTRL_2; /**< MICFIL Control register 2, offset: 0x4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN2/
DMIMX8MN2_cm7.h42367 __IO uint32_t CTRL_2; /**< MICFIL Control register 2, offset: 0x4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN4/
DMIMX8MN4_cm7.h42367 __IO uint32_t CTRL_2; /**< MICFIL Control register 2, offset: 0x4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h33669 __IO uint32_t CTRL_2; /**< MICFIL Control 2, offset: 0x4 */ member
DMIMXRT735S_cm33_core1.h33729 __IO uint32_t CTRL_2; /**< MICFIL Control 2, offset: 0x4 */ member
DMIMXRT735S_ezhv.h48912 __IO uint32_t CTRL_2; /**< MICFIL Control 2, offset: 0x4 */ member
DMIMXRT735S_cm33_core0.h48936 __IO uint32_t CTRL_2; /**< MICFIL Control 2, offset: 0x4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN3/
DMIMX8MN3_cm7.h42369 __IO uint32_t CTRL_2; /**< MICFIL Control register 2, offset: 0x4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN1/
DMIMX8MN1_cm7.h42369 __IO uint32_t CTRL_2; /**< MICFIL Control register 2, offset: 0x4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN6/
DMIMX8MN6_cm7.h42367 __IO uint32_t CTRL_2; /**< MICFIL Control register 2, offset: 0x4 */ member
DMIMX8MN6_ca53.h42381 __IO uint32_t CTRL_2; /**< MICFIL Control register 2, offset: 0x4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h36526 __IO uint32_t CTRL_2; /**< MICFIL Control 2, offset: 0x4 */ member
DMIMXRT758S_hifi1.h36464 __IO uint32_t CTRL_2; /**< MICFIL Control 2, offset: 0x4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h42734 __IO uint32_t CTRL_2; /**< MICFIL Control 2, offset: 0x4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h42704 __IO uint32_t CTRL_2; /**< MICFIL Control 2, offset: 0x4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h36464 __IO uint32_t CTRL_2; /**< MICFIL Control 2, offset: 0x4 */ member
DMIMXRT798S_cm33_core1.h36526 __IO uint32_t CTRL_2; /**< MICFIL Control 2, offset: 0x4 */ member
DMIMXRT798S_hifi4.h51650 __IO uint32_t CTRL_2; /**< MICFIL Control 2, offset: 0x4 */ member
DMIMXRT798S_cm33_core0.h51735 __IO uint32_t CTRL_2; /**< MICFIL Control 2, offset: 0x4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h53561 __IO uint32_t CTRL_2; /**< MICFIL Control 2, offset: 0x4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h53561 __IO uint32_t CTRL_2; /**< MICFIL Control 2, offset: 0x4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h59165 __IO uint32_t CTRL_2; /**< PDM Control register 2, offset: 0x4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h57739 __IO uint32_t CTRL_2; /**< PDM Control register 2, offset: 0x4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h58263 __IO uint32_t CTRL_2; /**< PDM Control register 2, offset: 0x4 */ member

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