| /hal_nxp-latest/mcux/middleware/mcux-sdk-middleware-usb/host/ |
| D | usb_host_khci.c | 201 usbHostPointer->usbRegBase->CTL |= USB_CTL_RESUME_MASK; in USB_HostKhciIsrFunction() 228 usbHostPointer->usbRegBase->CTL |= USB_CTL_ODDRST_MASK; in _USB_HostKhciAttach() 229 usbHostPointer->usbRegBase->CTL = USB_CTL_HOSTMODEEN_MASK; in _USB_HostKhciAttach() 242 temp = (0U != ((usbHostPointer->usbRegBase->CTL) & USB_CTL_JSTATE_MASK)) ? 0U : 1U; in _USB_HostKhciAttach() 247 speed = (0U != ((usbHostPointer->usbRegBase->CTL) & USB_CTL_JSTATE_MASK)) ? 0U : 1U; in _USB_HostKhciAttach() 259 if (((usbHostPointer->usbRegBase->CTL) & USB_CTL_SE0_MASK) == USB_CTL_SE0_MASK) in _USB_HostKhciAttach() 283 usbHostPointer->usbRegBase->CTL |= USB_CTL_RESET_MASK; in _USB_HostKhciAttach() 289 usbHostPointer->usbRegBase->CTL &= (uint8_t)(~USB_CTL_RESET_MASK); in _USB_HostKhciAttach() 291 usbHostPointer->usbRegBase->CTL |= USB_CTL_USBENSOFEN_MASK; in _USB_HostKhciAttach() 325 usbHostPointer->usbRegBase->CTL |= USB_CTL_USBENSOFEN_MASK; in _USB_HostKhciReset() [all …]
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/lpc_miniusart/ |
| D | fsl_usart.h | 451 …base->CTL = (base->CTL & ~USART_CTL_RXIDLETOCFG_MASK) | USART_CTL_RXIDLETOCFG((uint32_t)rxIdleTime… in USART_SetRxIdleTimeout() 485 base->CTL |= USART_CTL_CC_MASK; in USART_EnableContinuousSCLK() 489 base->CTL &= ~USART_CTL_CC_MASK; in USART_EnableContinuousSCLK() 505 base->CTL |= USART_CTL_CLRCCONRX_MASK; in USART_EnableAutoClearSCLK() 509 base->CTL &= ~USART_CTL_CLRCCONRX_MASK; in USART_EnableAutoClearSCLK() 546 base->CTL &= ~USART_CTL_TXDIS_MASK; in USART_EnableTx() 550 base->CTL |= USART_CTL_TXDIS_MASK; in USART_EnableTx() 572 if ((base->CTL & USART_CTL_TXDIS_MASK) != 0U) in USART_EnableRx()
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| D | fsl_usart.c | 238 base->CTL |= USART_CTL_RXIDLETOCFG(config->rxIdleTimeout); in USART_Init() 641 base->CTL &= ~USART_CTL_TXDIS_MASK; in USART_TransferSendNonBlocking()
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| /hal_nxp-latest/s32/drivers/s32ze/Mcu/src/ |
| D | Clock_Ip_Specific.c | 189 …uint32 CoreDfsIsInReset = IP_CORE_DFS->CTL & DFS_CTL_DFS_RESET_MASK; /* if master core … in Clock_Ip_SpecificPlatformInitClock() 190 …uint32 PeriphDfsIsInReset = IP_PERIPH_DFS->CTL & DFS_CTL_DFS_RESET_MASK; /* if master perip… in Clock_Ip_SpecificPlatformInitClock() 225 IP_CORE_DFS->CTL &= ~DFS_CTL_DFS_RESET_MASK; in Clock_Ip_SpecificPlatformInitClock() 235 IP_PERIPH_DFS->CTL &= ~DFS_CTL_DFS_RESET_MASK; in Clock_Ip_SpecificPlatformInitClock() 258 IP_CORE_DFS->CTL &= ~DFS_CTL_DFS_RESET_MASK; in Clock_Ip_SpecificPlatformInitClock() 281 IP_PERIPH_DFS->CTL &= ~DFS_CTL_DFS_RESET_MASK; in Clock_Ip_SpecificPlatformInitClock()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/flexcomm/usart/ |
| D | fsl_usart.h | 460 base->CTL |= (uint32_t)USART_CTL_ADDRDET_MASK; in USART_EnableMatchAddress() 465 base->CTL &= ~(uint32_t)USART_CTL_ADDRDET_MASK; in USART_EnableMatchAddress() 642 base->CTL |= USART_CTL_CC_MASK; in USART_EnableContinuousSCLK() 646 base->CTL &= ~USART_CTL_CC_MASK; in USART_EnableContinuousSCLK() 662 base->CTL |= USART_CTL_CLRCCONRX_MASK; in USART_EnableAutoClearSCLK() 666 base->CTL &= ~USART_CTL_CLRCCONRX_MASK; in USART_EnableAutoClearSCLK()
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| D | fsl_usart.c | 964 base->CTL |= (uint32_t)USART_CTL_ADDRDET_MASK; in USART_TransferReceiveNonBlocking() 1203 base->CTL &= ~(uint32_t)USART_CTL_ADDRDET_MASK; in USART_TransferHandleIRQ()
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| /hal_nxp-latest/mcux/middleware/mcux-sdk-middleware-usb/device/ |
| D | usb_device_khci.c | 134 khciState->registerBase->CTL &= (uint8_t)(~USB_CTL_TXSUSPENDTOKENBUSY_MASK); 210 khciState->registerBase->CTL |= USB_CTL_ODDRST_MASK; in USB_DeviceKhciSetDefaultState() 230 khciState->registerBase->CTL &= (uint8_t)(~USB_CTL_ODDRST_MASK); in USB_DeviceKhciSetDefaultState() 263 khciState->registerBase->CTL &= (uint8_t)(~USB_CTL_TXSUSPENDTOKENBUSY_MASK); in USB_DeviceKhciSetDefaultState() 529 khciState->registerBase->CTL &= (uint8_t)(~USB_CTL_TXSUSPENDTOKENBUSY_MASK); in USB_DeviceKhciEndpointStall() 628 khciState->registerBase->CTL &= (uint8_t)(~USB_CTL_TXSUSPENDTOKENBUSY_MASK); in USB_DeviceKhciEndpointUnstall() 882 khciState->registerBase->CTL &= (uint8_t)(~USB_CTL_TXSUSPENDTOKENBUSY_MASK); in USB_DeviceKhciInterruptTokenDone() 1304 khciState->registerBase->CTL = 0x00U; in USB_DeviceKhciDeinit() 1538 khciState->registerBase->CTL |= USB_CTL_USBENSOFEN_MASK; in USB_DeviceKhciControl() 1625 khciState->registerBase->CTL |= USB_CTL_RESUME_MASK; in USB_DeviceKhciControl() [all …]
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| /hal_nxp-latest/mcux/middleware/mcux-sdk-middleware-usb/otg/ |
| D | usb_otg_khci.c | 456 otgKhciInstance->usbRegBase->CTL |= USB_CTL_RESUME_MASK; in USB_OtgKhciControl() 463 otgKhciInstance->usbRegBase->CTL &= (uint8_t)(~USB_CTL_RESUME_MASK); in USB_OtgKhciControl() 538 otgKhciInstance->se0State = otgKhciInstance->usbRegBase->CTL & USB_CTL_SE0_MASK; in USB_OtgKhciIsrFunction() 545 otgKhciInstance->jState = otgKhciInstance->usbRegBase->CTL & USB_CTL_JSTATE_MASK; in USB_OtgKhciIsrFunction() 554 otgKhciInstance->se0State = otgKhciInstance->usbRegBase->CTL & USB_CTL_SE0_MASK; in USB_OtgKhciIsrFunction()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/ltc/ |
| D | fsl_ltc_edma.c | 1493 base->CTL |= LTC_CTL_IFE_MASK; in LTC_EnableInputFifoDMA() 1497 base->CTL &= ~LTC_CTL_IFE_MASK; in LTC_EnableInputFifoDMA() 1513 base->CTL |= LTC_CTL_OFE_MASK; in LTC_EnableOutputFifoDMA() 1517 base->CTL &= ~LTC_CTL_OFE_MASK; in LTC_EnableOutputFifoDMA() 1587 base->CTL &= ~LTC_CTL_IFR_MASK; /* 1 entry */ in ltc_symmetric_process_EDMA() 1605 base->CTL &= ~LTC_CTL_OFR_MASK; /* 1 entry */ in ltc_symmetric_process_EDMA() 1667 base->CTL &= ~LTC_CTL_IFR_MASK; in LTC_CreateHandleEDMA() 1668 base->CTL &= ~LTC_CTL_OFR_MASK; in LTC_CreateHandleEDMA()
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| D | fsl_ltc.c | 511 base->CTL |= (uint32_t)kLTC_CtrlSwapAll; in ltc_symmetric_alg_state() 3137 base->CTL |= kLTC_CtrlSwapAll; in ltc_hash_engine_init()
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| /hal_nxp-latest/s32/drivers/s32k3/Mcu/src/ |
| D | Clock_Ip_Specific.c | 421 RegValue = IP_FLASH->CTL; in Clock_Ip_CodeInRamSetFlashWaitStates() 431 IP_FLASH->CTL &= ~FLASH_CTL_RWSL_MASK; in Clock_Ip_CodeInRamSetFlashWaitStates() 434 IP_FLASH->CTL = RegValue; in Clock_Ip_CodeInRamSetFlashWaitStates()
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| /hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/ |
| D | S32Z2_FEED_DMACRC.h | 79 …__IO uint32_t CTL; /**< CRC Control Register, array offset: 0x10, ar… member
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| D | S32Z2_RESULT_DMACRC.h | 79 …__IO uint32_t CTL; /**< CRC Control Register, array offset: 0x10, ar… member
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| D | S32Z2_DMA_CRC.h | 79 …__IO uint32_t CTL; /**< CRC Control Register, array offset: 0x10, ar… member
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| D | S32Z2_DFS.h | 80 __IO uint32_t CTL; /**< Control, offset: 0x18 */ member
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| /hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/ |
| D | S32K344_FLASH.h | 80 __IO uint32_t CTL; /**< Module Control, offset: 0xC */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXC243/ |
| D | MCXC243.h | 10952 __IO uint8_t CTL; /**< Control register, offset: 0x94 */ member 11816 #define CTL1 CTL
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXC244/ |
| D | MCXC244.h | 10954 __IO uint8_t CTL; /**< Control register, offset: 0x94 */ member 11818 #define CTL1 CTL
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC811/ |
| D | LPC811.h | 5607 …__IO uint32_t CTL; /**< USART Control register. USART control settin… member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC812/ |
| D | LPC812.h | 5615 …__IO uint32_t CTL; /**< USART Control register. USART control settin… member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC810/ |
| D | LPC810.h | 5607 …__IO uint32_t CTL; /**< USART Control register. USART control settin… member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC802/ |
| D | LPC802.h | 5457 …__IO uint32_t CTL; /**< USART Control register. USART control settin… member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC804/ |
| D | LPC804.h | 6484 …__IO uint32_t CTL; /**< USART Control register. USART control settin… member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/K32L2B21A/ |
| D | K32L2B21A.h | 13911 __IO uint8_t CTL; /**< Control register, offset: 0x94 */ member 14724 #define CTL1 CTL
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| /hal_nxp-latest/mcux/mcux-sdk/devices/K32L2B31A/ |
| D | K32L2B31A.h | 13911 __IO uint8_t CTL; /**< Control register, offset: 0x94 */ member 14724 #define CTL1 CTL
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