Home
last modified time | relevance | path

Searched refs:CTIMER_CCR_CAP1FE_MASK (Results 1 – 25 of 89) sorted by relevance

1234

/hal_nxp-latest/mcux/mcux-sdk/devices/LPC802/
DLPC802.h1406 #define CTIMER_CCR_CAP1FE_MASK (0x10U) macro
1411 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP1FE_SHIFT)) & CTIMER_CCR_CAP1FE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC804/
DLPC804.h1788 #define CTIMER_CCR_CAP1FE_MASK (0x10U) macro
1793 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP1FE_SHIFT)) & CTIMER_CCR_CAP1FE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC844/
DLPC844.h1490 #define CTIMER_CCR_CAP1FE_MASK (0x10U) macro
1495 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP1FE_SHIFT)) & CTIMER_CCR_CAP1FE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC845/
DLPC845.h1896 #define CTIMER_CCR_CAP1FE_MASK (0x10U) macro
1901 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP1FE_SHIFT)) & CTIMER_CCR_CAP1FE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC51U68/
DLPC51U68.h1498 #define CTIMER_CCR_CAP1FE_MASK (0x10U) macro
1503 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP1FE_SHIFT)) & CTIMER_CCR_CAP1FE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54114/
DLPC54114_cm0plus.h1454 #define CTIMER_CCR_CAP1FE_MASK (0x10U) macro
1459 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP1FE_SHIFT)) & CTIMER_CCR_CAP1FE_MASK)
DLPC54114_cm4.h1465 #define CTIMER_CCR_CAP1FE_MASK (0x10U) macro
1470 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP1FE_SHIFT)) & CTIMER_CCR_CAP1FE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54113/
DLPC54113.h1466 #define CTIMER_CCR_CAP1FE_MASK (0x10U) macro
1471 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP1FE_SHIFT)) & CTIMER_CCR_CAP1FE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54607/
DLPC54607.h1728 #define CTIMER_CCR_CAP1FE_MASK (0x10U) macro
1733 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP1FE_SHIFT)) & CTIMER_CCR_CAP1FE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S005/
DLPC54S005.h2135 #define CTIMER_CCR_CAP1FE_MASK (0x10U) macro
2140 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP1FE_SHIFT)) & CTIMER_CCR_CAP1FE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54005/
DLPC54005.h1727 #define CTIMER_CCR_CAP1FE_MASK (0x10U) macro
1732 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP1FE_SHIFT)) & CTIMER_CCR_CAP1FE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54605/
DLPC54605.h1731 #define CTIMER_CCR_CAP1FE_MASK (0x10U) macro
1736 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP1FE_SHIFT)) & CTIMER_CCR_CAP1FE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54606/
DLPC54606.h3197 #define CTIMER_CCR_CAP1FE_MASK (0x10U) macro
3202 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP1FE_SHIFT)) & CTIMER_CCR_CAP1FE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54016/
DLPC54016.h2977 #define CTIMER_CCR_CAP1FE_MASK (0x10U) macro
2982 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP1FE_SHIFT)) & CTIMER_CCR_CAP1FE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54616/
DLPC54616.h3272 #define CTIMER_CCR_CAP1FE_MASK (0x10U) macro
3277 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP1FE_SHIFT)) & CTIMER_CCR_CAP1FE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54018M/
DLPC54018M.h3270 #define CTIMER_CCR_CAP1FE_MASK (0x10U) macro
3275 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP1FE_SHIFT)) & CTIMER_CCR_CAP1FE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54628/
DLPC54628.h3268 #define CTIMER_CCR_CAP1FE_MASK (0x10U) macro
3273 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP1FE_SHIFT)) & CTIMER_CCR_CAP1FE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502/
DLPC5502.h6617 #define CTIMER_CCR_CAP1FE_MASK (0x10U) macro
6622 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP1FE_SHIFT)) & CTIMER_CCR_CAP1FE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502CPXXXX/
DLPC5502CPXXXX.h6572 #define CTIMER_CCR_CAP1FE_MASK (0x10U) macro
6577 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP1FE_SHIFT)) & CTIMER_CCR_CAP1FE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54618/
DLPC54618.h3270 #define CTIMER_CCR_CAP1FE_MASK (0x10U) macro
3275 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP1FE_SHIFT)) & CTIMER_CCR_CAP1FE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S018/
DLPC54S018.h3678 #define CTIMER_CCR_CAP1FE_MASK (0x10U) macro
3683 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP1FE_SHIFT)) & CTIMER_CCR_CAP1FE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54018/
DLPC54018.h3270 #define CTIMER_CCR_CAP1FE_MASK (0x10U) macro
3275 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP1FE_SHIFT)) & CTIMER_CCR_CAP1FE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S016/
DLPC54S016.h3342 #define CTIMER_CCR_CAP1FE_MASK (0x10U) macro
3347 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP1FE_SHIFT)) & CTIMER_CCR_CAP1FE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504CPXXXX/
DLPC5504CPXXXX.h6572 #define CTIMER_CCR_CAP1FE_MASK (0x10U) macro
6577 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP1FE_SHIFT)) & CTIMER_CCR_CAP1FE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504/
DLPC5504.h6617 #define CTIMER_CCR_CAP1FE_MASK (0x10U) macro
6622 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP1FE_SHIFT)) & CTIMER_CCR_CAP1FE_MASK)

1234