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Searched refs:CTIMER_CCR_CAP0RE_MASK (Results 1 – 25 of 90) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/ctimer/
Dfsl_ctimer.c457 reg &= ~((uint32_t)((uint32_t)CTIMER_CCR_CAP0RE_MASK | (uint32_t)CTIMER_CCR_CAP0FE_MASK | in CTIMER_SetupCapture()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC802/
DLPC802.h1383 #define CTIMER_CCR_CAP0RE_MASK (0x1U) macro
1388 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP0RE_SHIFT)) & CTIMER_CCR_CAP0RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC804/
DLPC804.h1765 #define CTIMER_CCR_CAP0RE_MASK (0x1U) macro
1770 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP0RE_SHIFT)) & CTIMER_CCR_CAP0RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC844/
DLPC844.h1467 #define CTIMER_CCR_CAP0RE_MASK (0x1U) macro
1472 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP0RE_SHIFT)) & CTIMER_CCR_CAP0RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC845/
DLPC845.h1873 #define CTIMER_CCR_CAP0RE_MASK (0x1U) macro
1878 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP0RE_SHIFT)) & CTIMER_CCR_CAP0RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC51U68/
DLPC51U68.h1475 #define CTIMER_CCR_CAP0RE_MASK (0x1U) macro
1480 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP0RE_SHIFT)) & CTIMER_CCR_CAP0RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54114/
DLPC54114_cm0plus.h1431 #define CTIMER_CCR_CAP0RE_MASK (0x1U) macro
1436 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP0RE_SHIFT)) & CTIMER_CCR_CAP0RE_MASK)
DLPC54114_cm4.h1442 #define CTIMER_CCR_CAP0RE_MASK (0x1U) macro
1447 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP0RE_SHIFT)) & CTIMER_CCR_CAP0RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54113/
DLPC54113.h1443 #define CTIMER_CCR_CAP0RE_MASK (0x1U) macro
1448 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP0RE_SHIFT)) & CTIMER_CCR_CAP0RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54607/
DLPC54607.h1701 #define CTIMER_CCR_CAP0RE_MASK (0x1U) macro
1706 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP0RE_SHIFT)) & CTIMER_CCR_CAP0RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S005/
DLPC54S005.h2108 #define CTIMER_CCR_CAP0RE_MASK (0x1U) macro
2113 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP0RE_SHIFT)) & CTIMER_CCR_CAP0RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54005/
DLPC54005.h1700 #define CTIMER_CCR_CAP0RE_MASK (0x1U) macro
1705 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP0RE_SHIFT)) & CTIMER_CCR_CAP0RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54605/
DLPC54605.h1704 #define CTIMER_CCR_CAP0RE_MASK (0x1U) macro
1709 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP0RE_SHIFT)) & CTIMER_CCR_CAP0RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54606/
DLPC54606.h3170 #define CTIMER_CCR_CAP0RE_MASK (0x1U) macro
3175 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP0RE_SHIFT)) & CTIMER_CCR_CAP0RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54016/
DLPC54016.h2951 #define CTIMER_CCR_CAP0RE_MASK (0x1U) macro
2956 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP0RE_SHIFT)) & CTIMER_CCR_CAP0RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54616/
DLPC54616.h3245 #define CTIMER_CCR_CAP0RE_MASK (0x1U) macro
3250 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP0RE_SHIFT)) & CTIMER_CCR_CAP0RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54018M/
DLPC54018M.h3243 #define CTIMER_CCR_CAP0RE_MASK (0x1U) macro
3248 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP0RE_SHIFT)) & CTIMER_CCR_CAP0RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54628/
DLPC54628.h3241 #define CTIMER_CCR_CAP0RE_MASK (0x1U) macro
3246 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP0RE_SHIFT)) & CTIMER_CCR_CAP0RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502/
DLPC5502.h6590 #define CTIMER_CCR_CAP0RE_MASK (0x1U) macro
6595 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP0RE_SHIFT)) & CTIMER_CCR_CAP0RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502CPXXXX/
DLPC5502CPXXXX.h6545 #define CTIMER_CCR_CAP0RE_MASK (0x1U) macro
6550 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP0RE_SHIFT)) & CTIMER_CCR_CAP0RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54618/
DLPC54618.h3243 #define CTIMER_CCR_CAP0RE_MASK (0x1U) macro
3248 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP0RE_SHIFT)) & CTIMER_CCR_CAP0RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S018/
DLPC54S018.h3651 #define CTIMER_CCR_CAP0RE_MASK (0x1U) macro
3656 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP0RE_SHIFT)) & CTIMER_CCR_CAP0RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54018/
DLPC54018.h3243 #define CTIMER_CCR_CAP0RE_MASK (0x1U) macro
3248 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP0RE_SHIFT)) & CTIMER_CCR_CAP0RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S016/
DLPC54S016.h3316 #define CTIMER_CCR_CAP0RE_MASK (0x1U) macro
3321 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP0RE_SHIFT)) & CTIMER_CCR_CAP0RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504CPXXXX/
DLPC5504CPXXXX.h6545 #define CTIMER_CCR_CAP0RE_MASK (0x1U) macro
6550 … (((uint32_t)(((uint32_t)(x)) << CTIMER_CCR_CAP0RE_SHIFT)) & CTIMER_CCR_CAP0RE_MASK)

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