Home
last modified time | relevance | path

Searched refs:CTIMER7FCLKSEL_OFFSET (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/drivers/
Dfsl_clock.h876 #define CTIMER7FCLKSEL_OFFSET 0x7A8 macro
1384 … CLKCTL1_TUPLE_MUXA(CTIMER7FCLKSEL_OFFSET, 0), /*!< Attach Sense base clock to CTIMER7 Clock. */
1385 …kAUDIO_VDD1_to_CTIMER7 = CLKCTL1_TUPLE_MUXA(CTIMER7FCLKSEL_OFFSET, 1), /*!< Attach audio_clk to CT…
1387 … CLKCTL1_TUPLE_MUXA(CTIMER7FCLKSEL_OFFSET, 2), /*!< Attach FRO2 Max clock to CTIMER7 Clock. */
1389 … CLKCTL1_TUPLE_MUXA(CTIMER7FCLKSEL_OFFSET, 3), /*!< Attach 32KHz wake clock to CTIMER7 Clock. */
1390 …kNONE_to_CTIMER7 = CLKCTL1_TUPLE_MUXA_NONE(CTIMER7FCLKSEL_OFFSET, 0), /*!< Attach NONE to CTIMER7 …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/drivers/
Dfsl_clock.h876 #define CTIMER7FCLKSEL_OFFSET 0x7A8 macro
1384 … CLKCTL1_TUPLE_MUXA(CTIMER7FCLKSEL_OFFSET, 0), /*!< Attach Sense base clock to CTIMER7 Clock. */
1385 …kAUDIO_VDD1_to_CTIMER7 = CLKCTL1_TUPLE_MUXA(CTIMER7FCLKSEL_OFFSET, 1), /*!< Attach audio_clk to CT…
1387 … CLKCTL1_TUPLE_MUXA(CTIMER7FCLKSEL_OFFSET, 2), /*!< Attach FRO2 Max clock to CTIMER7 Clock. */
1389 … CLKCTL1_TUPLE_MUXA(CTIMER7FCLKSEL_OFFSET, 3), /*!< Attach 32KHz wake clock to CTIMER7 Clock. */
1390 …kNONE_to_CTIMER7 = CLKCTL1_TUPLE_MUXA_NONE(CTIMER7FCLKSEL_OFFSET, 0), /*!< Attach NONE to CTIMER7 …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/drivers/
Dfsl_clock.h876 #define CTIMER7FCLKSEL_OFFSET 0x7A8 macro
1384 … CLKCTL1_TUPLE_MUXA(CTIMER7FCLKSEL_OFFSET, 0), /*!< Attach Sense base clock to CTIMER7 Clock. */
1385 …kAUDIO_VDD1_to_CTIMER7 = CLKCTL1_TUPLE_MUXA(CTIMER7FCLKSEL_OFFSET, 1), /*!< Attach audio_clk to CT…
1387 … CLKCTL1_TUPLE_MUXA(CTIMER7FCLKSEL_OFFSET, 2), /*!< Attach FRO2 Max clock to CTIMER7 Clock. */
1389 … CLKCTL1_TUPLE_MUXA(CTIMER7FCLKSEL_OFFSET, 3), /*!< Attach 32KHz wake clock to CTIMER7 Clock. */
1390 …kNONE_to_CTIMER7 = CLKCTL1_TUPLE_MUXA_NONE(CTIMER7FCLKSEL_OFFSET, 0), /*!< Attach NONE to CTIMER7 …