Searched refs:CTIMER5FCLKSEL_OFFSET (Results 1 – 3 of 3) sorted by relevance
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/drivers/ |
| D | fsl_clock.h | 874 #define CTIMER5FCLKSEL_OFFSET 0x7A0 macro
1366 … CLKCTL1_TUPLE_MUXA(CTIMER5FCLKSEL_OFFSET, 0), /*!< Attach Sense base clock to CTIMER5 Clock. */
1367 …kAUDIO_VDD1_to_CTIMER5 = CLKCTL1_TUPLE_MUXA(CTIMER5FCLKSEL_OFFSET, 1), /*!< Attach audio_clk to CT…
1369 … CLKCTL1_TUPLE_MUXA(CTIMER5FCLKSEL_OFFSET, 2), /*!< Attach FRO2 Max clock to CTIMER5 Clock. */
1371 … CLKCTL1_TUPLE_MUXA(CTIMER5FCLKSEL_OFFSET, 3), /*!< Attach 32KHz wake clock to CTIMER5 Clock. */
1372 …kNONE_to_CTIMER5 = CLKCTL1_TUPLE_MUXA_NONE(CTIMER5FCLKSEL_OFFSET, 0), /*!< Attach NONE to CTIMER5 …
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/drivers/ |
| D | fsl_clock.h | 874 #define CTIMER5FCLKSEL_OFFSET 0x7A0 macro
1366 … CLKCTL1_TUPLE_MUXA(CTIMER5FCLKSEL_OFFSET, 0), /*!< Attach Sense base clock to CTIMER5 Clock. */
1367 …kAUDIO_VDD1_to_CTIMER5 = CLKCTL1_TUPLE_MUXA(CTIMER5FCLKSEL_OFFSET, 1), /*!< Attach audio_clk to CT…
1369 … CLKCTL1_TUPLE_MUXA(CTIMER5FCLKSEL_OFFSET, 2), /*!< Attach FRO2 Max clock to CTIMER5 Clock. */
1371 … CLKCTL1_TUPLE_MUXA(CTIMER5FCLKSEL_OFFSET, 3), /*!< Attach 32KHz wake clock to CTIMER5 Clock. */
1372 …kNONE_to_CTIMER5 = CLKCTL1_TUPLE_MUXA_NONE(CTIMER5FCLKSEL_OFFSET, 0), /*!< Attach NONE to CTIMER5 …
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/drivers/ |
| D | fsl_clock.h | 874 #define CTIMER5FCLKSEL_OFFSET 0x7A0 macro
1366 … CLKCTL1_TUPLE_MUXA(CTIMER5FCLKSEL_OFFSET, 0), /*!< Attach Sense base clock to CTIMER5 Clock. */
1367 …kAUDIO_VDD1_to_CTIMER5 = CLKCTL1_TUPLE_MUXA(CTIMER5FCLKSEL_OFFSET, 1), /*!< Attach audio_clk to CT…
1369 … CLKCTL1_TUPLE_MUXA(CTIMER5FCLKSEL_OFFSET, 2), /*!< Attach FRO2 Max clock to CTIMER5 Clock. */
1371 … CLKCTL1_TUPLE_MUXA(CTIMER5FCLKSEL_OFFSET, 3), /*!< Attach 32KHz wake clock to CTIMER5 Clock. */
1372 …kNONE_to_CTIMER5 = CLKCTL1_TUPLE_MUXA_NONE(CTIMER5FCLKSEL_OFFSET, 0), /*!< Attach NONE to CTIMER5 …
|
