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Searched refs:CTIMER4_BASE (Results 1 – 25 of 72) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54114/
DLPC54114_cm0plus.h1688 #define CTIMER4_BASE (0x40049000u) macro
1690 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
1692 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
DLPC54114_cm4.h1699 #define CTIMER4_BASE (0x40049000u) macro
1701 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
1703 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54113/
DLPC54113.h1700 #define CTIMER4_BASE (0x40049000u) macro
1702 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
1704 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502/
DLPC5502.h6905 #define CTIMER4_BASE (0x5002A000u) macro
6909 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6913 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
6938 #define CTIMER4_BASE (0x4002A000u) macro
6940 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6942 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502CPXXXX/
DLPC5502CPXXXX.h6860 #define CTIMER4_BASE (0x5002A000u) macro
6864 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6868 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
6893 #define CTIMER4_BASE (0x4002A000u) macro
6895 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6897 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504CPXXXX/
DLPC5504CPXXXX.h6860 #define CTIMER4_BASE (0x5002A000u) macro
6864 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6868 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
6893 #define CTIMER4_BASE (0x4002A000u) macro
6895 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6897 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504/
DLPC5504.h6905 #define CTIMER4_BASE (0x5002A000u) macro
6909 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6913 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
6938 #define CTIMER4_BASE (0x4002A000u) macro
6940 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6942 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506/
DLPC5506.h6905 #define CTIMER4_BASE (0x5002A000u) macro
6909 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6913 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
6938 #define CTIMER4_BASE (0x4002A000u) macro
6940 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6942 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506CPXXXX/
DLPC5506CPXXXX.h6860 #define CTIMER4_BASE (0x5002A000u) macro
6864 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6868 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
6893 #define CTIMER4_BASE (0x4002A000u) macro
6895 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6897 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5526/
DLPC5526.h6345 #define CTIMER4_BASE (0x5002A000u) macro
6349 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6353 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
6378 #define CTIMER4_BASE (0x4002A000u) macro
6380 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6382 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S06/
DLPC55S06.h7287 #define CTIMER4_BASE (0x5002A000u) macro
7291 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
7295 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
7320 #define CTIMER4_BASE (0x4002A000u) macro
7322 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
7324 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S04/
DLPC55S04.h7287 #define CTIMER4_BASE (0x5002A000u) macro
7291 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
7295 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
7320 #define CTIMER4_BASE (0x4002A000u) macro
7322 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
7324 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5528/
DLPC5528.h6344 #define CTIMER4_BASE (0x5002A000u) macro
6348 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6352 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
6377 #define CTIMER4_BASE (0x4002A000u) macro
6379 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6381 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5512/
DLPC5512.h7335 #define CTIMER4_BASE (0x5002A000u) macro
7339 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
7343 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
7368 #define CTIMER4_BASE (0x4002A000u) macro
7370 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
7372 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S26/
DLPC55S26.h6727 #define CTIMER4_BASE (0x5002A000u) macro
6731 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6735 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
6760 #define CTIMER4_BASE (0x4002A000u) macro
6762 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6764 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S28/
DLPC55S28.h6726 #define CTIMER4_BASE (0x5002A000u) macro
6730 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6734 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
6759 #define CTIMER4_BASE (0x4002A000u) macro
6761 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6763 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5514/
DLPC5514.h7336 #define CTIMER4_BASE (0x5002A000u) macro
7340 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
7344 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
7369 #define CTIMER4_BASE (0x4002A000u) macro
7371 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
7373 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S16/
DLPC55S16.h7719 #define CTIMER4_BASE (0x5002A000u) macro
7723 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
7727 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
7752 #define CTIMER4_BASE (0x4002A000u) macro
7754 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
7756 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S14/
DLPC55S14.h7718 #define CTIMER4_BASE (0x5002A000u) macro
7722 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
7726 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
7751 #define CTIMER4_BASE (0x4002A000u) macro
7753 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
7755 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5516/
DLPC5516.h7337 #define CTIMER4_BASE (0x5002A000u) macro
7341 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
7345 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
7370 #define CTIMER4_BASE (0x4002A000u) macro
7372 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
7374 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S66/
DLPC55S66_cm33_core1.h6727 #define CTIMER4_BASE (0x5002A000u) macro
6731 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6735 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
6760 #define CTIMER4_BASE (0x4002A000u) macro
6762 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6764 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
DLPC55S66_cm33_core0.h6727 #define CTIMER4_BASE (0x5002A000u) macro
6731 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6735 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
6760 #define CTIMER4_BASE (0x4002A000u) macro
6762 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6764 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S69/
DLPC55S69_cm33_core1.h6726 #define CTIMER4_BASE (0x5002A000u) macro
6730 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6734 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
6759 #define CTIMER4_BASE (0x4002A000u) macro
6761 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6763 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
DLPC55S69_cm33_core0.h6726 #define CTIMER4_BASE (0x5002A000u) macro
6730 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6734 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
6759 #define CTIMER4_BASE (0x4002A000u) macro
6761 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
6763 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54607/
DLPC54607.h1999 #define CTIMER4_BASE (0x40049000u) macro
2001 #define CTIMER4 ((CTIMER_Type *)CTIMER4_BASE)
2003 …DRS { CTIMER0_BASE, CTIMER1_BASE, CTIMER2_BASE, CTIMER3_BASE, CTIMER4_BASE }

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