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Searched refs:CTIMER0CLKDIV_OFFSET (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/drivers/
Dfsl_clock.h841 #define CTIMER0CLKDIV_OFFSET 0xA00 macro
1715 …kCLOCK_DivCtimer0Clk = CLKCTL0_TUPLE_MUXA(CTIMER0CLKDIV_OFFSET, 0), /*!< CTimer0 Clk Divider. …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/drivers/
Dfsl_clock.h841 #define CTIMER0CLKDIV_OFFSET 0xA00 macro
1715 …kCLOCK_DivCtimer0Clk = CLKCTL0_TUPLE_MUXA(CTIMER0CLKDIV_OFFSET, 0), /*!< CTimer0 Clk Divider. …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/drivers/
Dfsl_clock.h841 #define CTIMER0CLKDIV_OFFSET 0xA00 macro
1715 …kCLOCK_DivCtimer0Clk = CLKCTL0_TUPLE_MUXA(CTIMER0CLKDIV_OFFSET, 0), /*!< CTimer0 Clk Divider. …