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Searched refs:CT0_MAT3_PIO0_5 (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/dts/nxp/mcx/
DMCXN236VNL-pinctrl.h54 #define CT0_MAT3_PIO0_5 N9X_MUX('0',5,4) /* PT0_5 */ macro
DMCXN947VNL-pinctrl.h56 #define CT0_MAT3_PIO0_5 N9X_MUX('0',5,4) /* PT0_5 */ macro
DMCXN236VDF-pinctrl.h54 #define CT0_MAT3_PIO0_5 N9X_MUX('0',5,4) /* PT0_5 */ macro
DMCXN947VDF-pinctrl.h56 #define CT0_MAT3_PIO0_5 N9X_MUX('0',5,4) /* PT0_5 */ macro