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Searched refs:CPU (Results 1 – 25 of 27) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54114/arm/
DLPC541xx.dbgconf17 // <h> Slave CPU Image Entry
18 // <i> Slave CPU Image Entry
19 // <o> Slave CPU Image Entry
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54113/arm/
DLPC541xx.dbgconf17 // <h> Slave CPU Image Entry
18 // <i> Slave CPU Image Entry
19 // <o> Slave CPU Image Entry
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54606/arm/
DLPC5460x.dbgconf19 // <h> Slave CPU Image Entry
20 // <i> Slave CPU Image Entry
21 // <o> Slave CPU Image Entry
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54616/arm/
DLPC5460x.dbgconf19 // <h> Slave CPU Image Entry
20 // <i> Slave CPU Image Entry
21 // <o> Slave CPU Image Entry
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54618/arm/
DLPC5460x.dbgconf19 // <h> Slave CPU Image Entry
20 // <i> Slave CPU Image Entry
21 // <o> Slave CPU Image Entry
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54628/arm/
DLPC5460x.dbgconf19 // <h> Slave CPU Image Entry
20 // <i> Slave CPU Image Entry
21 // <o> Slave CPU Image Entry
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54605/arm/
DLPC5460x.dbgconf19 // <h> Slave CPU Image Entry
20 // <i> Slave CPU Image Entry
21 // <o> Slave CPU Image Entry
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54608/arm/
DLPC5460x.dbgconf19 // <h> Slave CPU Image Entry
20 // <i> Slave CPU Image Entry
21 // <o> Slave CPU Image Entry
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54607/arm/
DLPC5460x.dbgconf19 // <h> Slave CPU Image Entry
20 // <i> Slave CPU Image Entry
21 // <o> Slave CPU Image Entry
/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1170/
Devkmimxrt1170_connect_cm4_cm4side.jlinkscript29 CPU = CORTEX_M7;
49 CPU = CORTEX_M4;
Devkmimxrt1170_connect_cm4_cm4side_sdram.jlinkscript335 CPU = CORTEX_M7;
353 CPU = CORTEX_M4;
/hal_nxp-latest/mcux/mcux-sdk/boards/evkbmimxrt1170/
Devkbmimxrt1170_connect_cm4_cm4side.jlinkscript29 CPU = CORTEX_M7;
49 CPU = CORTEX_M4;
Devkbmimxrt1170_connect_cm4_cm4side_sdram.jlinkscript335 CPU = CORTEX_M7;
353 CPU = CORTEX_M4;
/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1180/jlinkscript/
Devkmimxrt1180_cm33.jlinkscript478 CPU = CORTEX_M7;
484 CPU = CORTEX_M33;
490 JLINK_SYS_Report1("Wrong CPU ID: ", cpuID);
595 JLINK_TARGET_Halt(); // Make sure that the CPU is halted when reset is called
Devkmimxrt1180_cm7.jlinkscript478 CPU = CORTEX_M7;
484 CPU = CORTEX_M33;
490 JLINK_SYS_Report1("Wrong CPU ID: ", cpuID);
595 JLINK_TARGET_Halt(); // Make sure that the CPU is halted when reset is called
/hal_nxp-latest/mcux/mcux-sdk/arch/
DKconfig36 # CPU features
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54113/mcuxpresso/
Dboot_multicore_slave.c50 #error Unrecognised MCU - cannot resolve Dual-CPU related registers
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54114/mcuxpresso/
Dboot_multicore_slave.c50 #error Unrecognised MCU - cannot resolve Dual-CPU related registers
/hal_nxp-latest/mcux/
DCMakeLists.txt7 # MCUX_CPU: "CPU"+ SOC part number, followed by core name when using a dual core part.
/hal_nxp-latest/s32/
DCMakeLists.txt69 # MCUX uses the CPU name to expose SoC-specific features of a given peripheral
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/gcc/
DLPC5534_ram.ld33 /* __pkc__ : SRAM A(16K) reserved for; pkc __power_down__ : The first 0x604 bytes reserved to CPU r…
DLPC5534_flash.ld33 /* __pkc__ : SRAM A(16K) reserved for; pkc __power_down__ : The first 0x604 bytes reserved to CPU r…
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/gcc/
DLPC5536_flash.ld33 /* __pkc__ : SRAM A(16K) reserved for; pkc __power_down__ : The first 0x604 bytes reserved to CPU r…
DLPC5536_ram.ld33 /* __pkc__ : SRAM A(16K) reserved for; pkc __power_down__ : The first 0x604 bytes reserved to CPU r…
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/gcc/
DLPC55S36_flash.ld32 /* __pkc__ : SRAM A(16K) reserved for; pkc __power_down__ : The first 0x604 bytes reserved to CPU r…

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