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Searched refs:CMP1_BASE (Results 1 – 25 of 98) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h1045 #define CMP1_BASE (0x40073008u) macro
1047 #define CMP1 ((CMP_Type *)CMP1_BASE)
1049 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/
DMKV10Z7.h963 #define CMP1_BASE (0x40073008u) macro
965 #define CMP1 ((CMP_Type *)CMP1_BASE)
967 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h1049 #define CMP1_BASE (0x40073008u) macro
1051 #define CMP1 ((CMP_Type *)CMP1_BASE)
1053 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h1062 #define CMP1_BASE (0x40073008u) macro
1064 #define CMP1 ((CMP_Type *)CMP1_BASE)
1066 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/
DMKV10Z1287.h954 #define CMP1_BASE (0x40073008u) macro
956 #define CMP1 ((CMP_Type *)CMP1_BASE)
958 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM14ZA5/
DMKM14ZA5.h3338 #define CMP1_BASE (0x40072008u) macro
3340 #define CMP1 ((CMP_Type *)CMP1_BASE)
3342 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F25612/
DMKV31F25612.h1064 #define CMP1_BASE (0x40073008u) macro
1066 #define CMP1 ((CMP_Type *)CMP1_BASE)
1068 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F51212/
DMKV31F51212.h1064 #define CMP1_BASE (0x40073008u) macro
1066 #define CMP1 ((CMP_Type *)CMP1_BASE)
1068 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV11Z7/
DMKV11Z7.h1741 #define CMP1_BASE (0x40073008u) macro
1743 #define CMP1 ((CMP_Type *)CMP1_BASE)
1745 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12810/
DMK22F12810.h1064 #define CMP1_BASE (0x40073008u) macro
1066 #define CMP1 ((CMP_Type *)CMP1_BASE)
1068 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z7/
DMKE15Z7.h1218 #define CMP1_BASE (0x40074000u) macro
1220 #define CMP1 ((CMP_Type *)CMP1_BASE)
1222 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z7/
DMKE14Z7.h1217 #define CMP1_BASE (0x40074000u) macro
1219 #define CMP1 ((CMP_Type *)CMP1_BASE)
1221 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F25612/
DMK22F25612.h1070 #define CMP1_BASE (0x40073008u) macro
1072 #define CMP1 ((CMP_Type *)CMP1_BASE)
1074 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h1998 #define CMP1_BASE (0x40074000u) macro
2000 #define CMP1 ((CMP_Type *)CMP1_BASE)
2006 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE, CMP2_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW22D5/
DMKW22D5.h1261 #define CMP1_BASE (0x40073008u) macro
1263 #define CMP1 ((CMP_Type *)CMP1_BASE)
1265 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW24D5/
DMKW24D5.h1261 #define CMP1_BASE (0x40073008u) macro
1263 #define CMP1 ((CMP_Type *)CMP1_BASE)
1265 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F51212/
DMK22F51212.h1080 #define CMP1_BASE (0x40073008u) macro
1082 #define CMP1 ((CMP_Type *)CMP1_BASE)
1084 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM33ZA5/
DMKM33ZA5.h3340 #define CMP1_BASE (0x40072008u) macro
3342 #define CMP1 ((CMP_Type *)CMP1_BASE)
3344 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A31A/
DK32L2A31A.h2072 #define CMP1_BASE (0x400EF000u) macro
2074 #define CMP1 ((CMP_Type *)CMP1_BASE)
2076 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A41A/
DK32L2A41A.h2072 #define CMP1_BASE (0x400EF000u) macro
2074 #define CMP1 ((CMP_Type *)CMP1_BASE)
2076 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM34ZA5/
DMKM34ZA5.h3336 #define CMP1_BASE (0x40072008u) macro
3338 #define CMP1 ((CMP_Type *)CMP1_BASE)
3340 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h3000 #define CMP1_BASE (0x40074000u) macro
3002 #define CMP1 ((CMP_Type *)CMP1_BASE)
3008 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE, CMP2_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h2996 #define CMP1_BASE (0x40074000u) macro
2998 #define CMP1 ((CMP_Type *)CMP1_BASE)
3004 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE, CMP2_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12/
DMK22F12.h4893 #define CMP1_BASE (0x40073008u) macro
4895 #define CMP1 ((CMP_Type *)CMP1_BASE)
4901 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE, CMP2_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM35Z7/
DMKM35Z7.h3717 #define CMP1_BASE (0x40072008u) macro
3719 #define CMP1 ((CMP_Type *)CMP1_BASE)
3725 #define CMP_BASE_ADDRS { CMP0_BASE, CMP1_BASE, CMP2_BASE }

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