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Searched refs:CMC_SSRS_CDOG1_MASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h9136 #define CMC_SSRS_CDOG1_MASK (0x8000000U) macro
9142 … (((uint32_t)(((uint32_t)(x)) << CMC_SSRS_CDOG1_SHIFT)) & CMC_SSRS_CDOG1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h9106 #define CMC_SSRS_CDOG1_MASK (0x8000000U) macro
9112 … (((uint32_t)(((uint32_t)(x)) << CMC_SSRS_CDOG1_SHIFT)) & CMC_SSRS_CDOG1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h11420 #define CMC_SSRS_CDOG1_MASK (0x8000000U) macro
11426 … (((uint32_t)(((uint32_t)(x)) << CMC_SSRS_CDOG1_SHIFT)) & CMC_SSRS_CDOG1_MASK)
DMCXN546_cm33_core1.h11420 #define CMC_SSRS_CDOG1_MASK (0x8000000U) macro
11426 … (((uint32_t)(((uint32_t)(x)) << CMC_SSRS_CDOG1_SHIFT)) & CMC_SSRS_CDOG1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h11420 #define CMC_SSRS_CDOG1_MASK (0x8000000U) macro
11426 … (((uint32_t)(((uint32_t)(x)) << CMC_SSRS_CDOG1_SHIFT)) & CMC_SSRS_CDOG1_MASK)
DMCXN547_cm33_core1.h11420 #define CMC_SSRS_CDOG1_MASK (0x8000000U) macro
11426 … (((uint32_t)(((uint32_t)(x)) << CMC_SSRS_CDOG1_SHIFT)) & CMC_SSRS_CDOG1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h11466 #define CMC_SSRS_CDOG1_MASK (0x8000000U) macro
11472 … (((uint32_t)(((uint32_t)(x)) << CMC_SSRS_CDOG1_SHIFT)) & CMC_SSRS_CDOG1_MASK)
DMCXN947_cm33_core0.h11466 #define CMC_SSRS_CDOG1_MASK (0x8000000U) macro
11472 … (((uint32_t)(((uint32_t)(x)) << CMC_SSRS_CDOG1_SHIFT)) & CMC_SSRS_CDOG1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h11466 #define CMC_SSRS_CDOG1_MASK (0x8000000U) macro
11472 … (((uint32_t)(((uint32_t)(x)) << CMC_SSRS_CDOG1_SHIFT)) & CMC_SSRS_CDOG1_MASK)
DMCXN946_cm33_core1.h11466 #define CMC_SSRS_CDOG1_MASK (0x8000000U) macro
11472 … (((uint32_t)(((uint32_t)(x)) << CMC_SSRS_CDOG1_SHIFT)) & CMC_SSRS_CDOG1_MASK)