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Searched refs:CERR (Results 1 – 25 of 80) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX9352/drivers/edma4/
Dfsl_edma_core.h95 #define DMA_CLEAR_ERROR_STATUS(base, channel) ((uint32_t)EDMA_BASE(base)->CERR = (uint8_t)channel)
/hal_nxp-latest/mcux/mcux-sdk/drivers/edma4/
Dfsl_edma_core.h95 #define DMA_CLEAR_ERROR_STATUS(base, channel) ((uint32_t)EDMA_BASE(base)->CERR = (uint8_t)channel)
/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K118_DMA.h89 __O uint8_t CERR; /**< Clear Error, offset: 0x1E */ member
DS32K116_DMA.h89 __O uint8_t CERR; /**< Clear Error, offset: 0x1E */ member
DS32K142W_DMA.h89 __O uint8_t CERR; /**< Clear Error, offset: 0x1E */ member
DS32K144W_DMA.h89 __O uint8_t CERR; /**< Clear Error, offset: 0x1E */ member
DS32K142_DMA.h89 __O uint8_t CERR; /**< Clear Error, offset: 0x1E */ member
DS32K144_DMA.h89 __O uint8_t CERR; /**< Clear Error, offset: 0x1E */ member
DS32K148_DMA.h89 __O uint8_t CERR; /**< Clear Error, offset: 0x1E */ member
DS32K146_DMA.h89 __O uint8_t CERR; /**< Clear Error, offset: 0x1E */ member
/hal_nxp-latest/mcux/mcux-sdk/drivers/edma/
Dfsl_edma.c803 base->CERR = (uint8_t)channel; in EDMA_ClearChannelStatusFlags()
/hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h1559 __O uint8_t CERR; /**< Clear Error Register, offset: 0x1E */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/
DMKV10Z7.h1467 __O uint8_t CERR; /**< Clear Error Register, offset: 0x1E */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h1563 __O uint8_t CERR; /**< Clear Error Register, offset: 0x1E */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h1576 __O uint8_t CERR; /**< Clear Error Register, offset: 0x1E */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/
DMKV10Z1287.h1458 __O uint8_t CERR; /**< Clear Error Register, offset: 0x1E */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h1665 __O uint8_t CERR; /**< Clear Error Register, offset: 0x1E */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h1667 __O uint8_t CERR; /**< Clear Error Register, offset: 0x1E */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h1632 __O uint8_t CERR; /**< Clear Error, offset: 0x1E */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/
DMKE13Z7.h1666 __O uint8_t CERR; /**< Clear Error Register, offset: 0x1E */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F25612/
DMKV31F25612.h1578 __O uint8_t CERR; /**< Clear Error Register, offset: 0x1E */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F51212/
DMKV31F51212.h1582 __O uint8_t CERR; /**< Clear Error Register, offset: 0x1E */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV11Z7/
DMKV11Z7.h2245 __O uint8_t CERR; /**< Clear Error Register, offset: 0x1E */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12810/
DMK22F12810.h1578 __O uint8_t CERR; /**< Clear Error Register, offset: 0x1E */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z9/
DMKE13Z9.h1633 __O uint8_t CERR; /**< Clear Error, offset: 0x1E */ member

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