| /hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1010/ |
| D | clock_config.c | 321 CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); in BOARD_BootClockRUN()
609 CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); in BOARD_BootClockRUN_400M()
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| /hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1015/ |
| D | clock_config.c | 336 CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); in BOARD_BootClockRUN()
641 CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); in BOARD_BootClockRUN_400M()
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| /hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1020/ |
| D | clock_config.c | 391 CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); in BOARD_BootClockRUN()
760 CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); in BOARD_BootClockRUN_400M()
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| /hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1024/ |
| D | clock_config.c | 391 CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); in BOARD_BootClockRUN()
760 CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); in BOARD_BootClockRUN_400M()
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| /hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1040/ |
| D | clock_config.c | 449 CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); in BOARD_BootClockRUN()
883 CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); in BOARD_BootClockRUN_600M()
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| /hal_nxp-latest/mcux/mcux-sdk/boards/evkbimxrt1050/ |
| D | clock_config.c | 459 CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); in BOARD_BootClockRUN()
898 CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); in BOARD_BootClockRUN_528M()
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| /hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1060/ |
| D | clock_config.c | 478 CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); in BOARD_BootClockRUN()
931 CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); in BOARD_BootClockRUN_528M()
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| /hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1064/ |
| D | clock_config.c | 480 CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); in BOARD_BootClockRUN()
935 CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); in BOARD_BootClockRUN_528M()
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| /hal_nxp-latest/mcux/mcux-sdk/boards/evkcmimxrt1060/ |
| D | clock_config.c | 477 CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); in BOARD_BootClockRUN()
930 CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); in BOARD_BootClockRUN_528M()
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| /hal_nxp-latest/mcux/mcux-sdk/boards/evkbmimxrt1060/ |
| D | clock_config.c | 478 CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); in BOARD_BootClockRUN()
931 CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); in BOARD_BootClockRUN_528M()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/drivers/ |
| D | fsl_clock.c | 1119 tmp32 &= ~(CCM_CCOSR_CLKO2_SEL_MASK | CCM_CCOSR_CLKO2_DIV_MASK); in CLOCK_SetClockOutput2()
1241 freq /= (((tmp32 & CCM_CCOSR_CLKO2_DIV_MASK) >> CCM_CCOSR_CLKO2_DIV_SHIFT) + 1U); in CLOCK_GetClockOutClkO2Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/drivers/ |
| D | fsl_clock.c | 1119 tmp32 &= ~(CCM_CCOSR_CLKO2_SEL_MASK | CCM_CCOSR_CLKO2_DIV_MASK); in CLOCK_SetClockOutput2()
1241 freq /= (((tmp32 & CCM_CCOSR_CLKO2_DIV_MASK) >> CCM_CCOSR_CLKO2_DIV_SHIFT) + 1U); in CLOCK_GetClockOutClkO2Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/drivers/ |
| D | fsl_clock.c | 1109 tmp32 &= ~(CCM_CCOSR_CLKO2_SEL_MASK | CCM_CCOSR_CLKO2_DIV_MASK); in CLOCK_SetClockOutput2()
1216 freq /= (((tmp32 & CCM_CCOSR_CLKO2_DIV_MASK) >> CCM_CCOSR_CLKO2_DIV_SHIFT) + 1U); in CLOCK_GetClockOutClkO2Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/drivers/ |
| D | fsl_clock.c | 1083 tmp32 &= ~(CCM_CCOSR_CLKO2_SEL_MASK | CCM_CCOSR_CLKO2_DIV_MASK); in CLOCK_SetClockOutput2()
1193 freq /= (((tmp32 & CCM_CCOSR_CLKO2_DIV_MASK) >> CCM_CCOSR_CLKO2_DIV_SHIFT) + 1U); in CLOCK_GetClockOutClkO2Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/drivers/ |
| D | fsl_clock.c | 1304 tmp32 &= ~(CCM_CCOSR_CLKO2_SEL_MASK | CCM_CCOSR_CLKO2_DIV_MASK); in CLOCK_SetClockOutput2()
1426 freq /= (((tmp32 & CCM_CCOSR_CLKO2_DIV_MASK) >> CCM_CCOSR_CLKO2_DIV_SHIFT) + 1U); in CLOCK_GetClockOutClkO2Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/drivers/ |
| D | fsl_clock.c | 1304 tmp32 &= ~(CCM_CCOSR_CLKO2_SEL_MASK | CCM_CCOSR_CLKO2_DIV_MASK); in CLOCK_SetClockOutput2()
1426 freq /= (((tmp32 & CCM_CCOSR_CLKO2_DIV_MASK) >> CCM_CCOSR_CLKO2_DIV_SHIFT) + 1U); in CLOCK_GetClockOutClkO2Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/drivers/ |
| D | fsl_clock.c | 1419 tmp32 &= ~(CCM_CCOSR_CLKO2_SEL_MASK | CCM_CCOSR_CLKO2_DIV_MASK); in CLOCK_SetClockOutput2()
1544 freq /= (((tmp32 & CCM_CCOSR_CLKO2_DIV_MASK) >> CCM_CCOSR_CLKO2_DIV_SHIFT) + 1U); in CLOCK_GetClockOutClkO2Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/drivers/ |
| D | fsl_clock.c | 1398 tmp32 &= ~(CCM_CCOSR_CLKO2_SEL_MASK | CCM_CCOSR_CLKO2_DIV_MASK); in CLOCK_SetClockOutput2()
1523 freq /= (((tmp32 & CCM_CCOSR_CLKO2_DIV_MASK) >> CCM_CCOSR_CLKO2_DIV_SHIFT) + 1U); in CLOCK_GetClockOutClkO2Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/drivers/ |
| D | fsl_clock.c | 1402 tmp32 &= ~(CCM_CCOSR_CLKO2_SEL_MASK | CCM_CCOSR_CLKO2_DIV_MASK); in CLOCK_SetClockOutput2()
1527 freq /= (((tmp32 & CCM_CCOSR_CLKO2_DIV_MASK) >> CCM_CCOSR_CLKO2_DIV_SHIFT) + 1U); in CLOCK_GetClockOutClkO2Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/drivers/ |
| D | fsl_clock.c | 1419 tmp32 &= ~(CCM_CCOSR_CLKO2_SEL_MASK | CCM_CCOSR_CLKO2_DIV_MASK); in CLOCK_SetClockOutput2()
1544 freq /= (((tmp32 & CCM_CCOSR_CLKO2_DIV_MASK) >> CCM_CCOSR_CLKO2_DIV_SHIFT) + 1U); in CLOCK_GetClockOutClkO2Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/drivers/ |
| D | fsl_clock.c | 1419 tmp32 &= ~(CCM_CCOSR_CLKO2_SEL_MASK | CCM_CCOSR_CLKO2_DIV_MASK); in CLOCK_SetClockOutput2()
1544 freq /= (((tmp32 & CCM_CCOSR_CLKO2_DIV_MASK) >> CCM_CCOSR_CLKO2_DIV_SHIFT) + 1U); in CLOCK_GetClockOutClkO2Freq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/ |
| D | MIMXRT1011.h | 4252 #define CCM_CCOSR_CLKO2_DIV_MASK (0xE00000U) macro
4264 … (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO2_DIV_SHIFT)) & CCM_CCOSR_CLKO2_DIV_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/ |
| D | MIMXRT1015.h | 4966 #define CCM_CCOSR_CLKO2_DIV_MASK (0xE00000U) macro
4978 … (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO2_DIV_SHIFT)) & CCM_CCOSR_CLKO2_DIV_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/ |
| D | MIMXRT1024.h | 6166 #define CCM_CCOSR_CLKO2_DIV_MASK (0xE00000U) macro
6178 … (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO2_DIV_SHIFT)) & CCM_CCOSR_CLKO2_DIV_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/ |
| D | MIMXRT1021.h | 6186 #define CCM_CCOSR_CLKO2_DIV_MASK (0xE00000U) macro
6198 … (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO2_DIV_SHIFT)) & CCM_CCOSR_CLKO2_DIV_MASK)
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