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Searched refs:CCM_CCOSR_CLKO1_EN_MASK (Results 1 – 25 of 33) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/drivers/
Dfsl_clock.c1081 … CCM->CCOSR &= ~(CCM_CCOSR_CLKO1_EN_MASK | CCM_CCOSR_CLKO1_SEL_MASK | CCM_CCOSR_CLKO1_DIV_MASK); in CLOCK_SetClockOutput1()
1085 … CCM->CCOSR &= ~(CCM_CCOSR_CLKO1_EN_MASK | CCM_CCOSR_CLKO1_SEL_MASK | CCM_CCOSR_CLKO1_DIV_MASK); in CLOCK_SetClockOutput1()
1087 CCM->CCOSR |= CCM_CCOSR_CLKO1_EN_MASK; in CLOCK_SetClockOutput1()
1128 if ((tmp32 & CCM_CCOSR_CLKO1_EN_MASK) != 0UL) in CLOCK_GetClockOutCLKO1Freq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/drivers/
Dfsl_clock.c1090 tmp32 &= ~CCM_CCOSR_CLKO1_EN_MASK; in CLOCK_SetClockOutput1()
1094 tmp32 |= CCM_CCOSR_CLKO1_EN_MASK; in CLOCK_SetClockOutput1()
1138 if ((tmp32 & CCM_CCOSR_CLKO1_EN_MASK) != 0UL) in CLOCK_GetClockOutCLKO1Freq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/drivers/
Dfsl_clock.c1090 tmp32 &= ~CCM_CCOSR_CLKO1_EN_MASK; in CLOCK_SetClockOutput1()
1094 tmp32 |= CCM_CCOSR_CLKO1_EN_MASK; in CLOCK_SetClockOutput1()
1138 if ((tmp32 & CCM_CCOSR_CLKO1_EN_MASK) != 0UL) in CLOCK_GetClockOutCLKO1Freq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/drivers/
Dfsl_clock.c1054 tmp32 &= ~CCM_CCOSR_CLKO1_EN_MASK; in CLOCK_SetClockOutput1()
1058 tmp32 |= CCM_CCOSR_CLKO1_EN_MASK; in CLOCK_SetClockOutput1()
1102 if ((tmp32 & CCM_CCOSR_CLKO1_EN_MASK) != 0UL) in CLOCK_GetClockOutCLKO1Freq()
/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1010/
Dclock_config.c327 CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; in BOARD_BootClockRUN()
615 CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; in BOARD_BootClockRUN_400M()
/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1015/
Dclock_config.c342 CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; in BOARD_BootClockRUN()
647 CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; in BOARD_BootClockRUN_400M()
/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1020/
Dclock_config.c397 CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; in BOARD_BootClockRUN()
766 CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; in BOARD_BootClockRUN_400M()
/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1024/
Dclock_config.c397 CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; in BOARD_BootClockRUN()
766 CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; in BOARD_BootClockRUN_400M()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/drivers/
Dfsl_clock.c1275 tmp32 &= ~CCM_CCOSR_CLKO1_EN_MASK; in CLOCK_SetClockOutput1()
1279 tmp32 |= CCM_CCOSR_CLKO1_EN_MASK; in CLOCK_SetClockOutput1()
1323 if ((tmp32 & CCM_CCOSR_CLKO1_EN_MASK) != 0UL) in CLOCK_GetClockOutCLKO1Freq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/drivers/
Dfsl_clock.c1275 tmp32 &= ~CCM_CCOSR_CLKO1_EN_MASK; in CLOCK_SetClockOutput1()
1279 tmp32 |= CCM_CCOSR_CLKO1_EN_MASK; in CLOCK_SetClockOutput1()
1323 if ((tmp32 & CCM_CCOSR_CLKO1_EN_MASK) != 0UL) in CLOCK_GetClockOutCLKO1Freq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/drivers/
Dfsl_clock.c1390 tmp32 &= ~CCM_CCOSR_CLKO1_EN_MASK; in CLOCK_SetClockOutput1()
1394 tmp32 |= CCM_CCOSR_CLKO1_EN_MASK; in CLOCK_SetClockOutput1()
1438 if ((tmp32 & CCM_CCOSR_CLKO1_EN_MASK) != 0UL) in CLOCK_GetClockOutCLKO1Freq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/drivers/
Dfsl_clock.c1369 tmp32 &= ~CCM_CCOSR_CLKO1_EN_MASK; in CLOCK_SetClockOutput1()
1373 tmp32 |= CCM_CCOSR_CLKO1_EN_MASK; in CLOCK_SetClockOutput1()
1417 if ((tmp32 & CCM_CCOSR_CLKO1_EN_MASK) != 0UL) in CLOCK_GetClockOutCLKO1Freq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/drivers/
Dfsl_clock.c1373 tmp32 &= ~CCM_CCOSR_CLKO1_EN_MASK; in CLOCK_SetClockOutput1()
1377 tmp32 |= CCM_CCOSR_CLKO1_EN_MASK; in CLOCK_SetClockOutput1()
1421 if ((tmp32 & CCM_CCOSR_CLKO1_EN_MASK) != 0UL) in CLOCK_GetClockOutCLKO1Freq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/drivers/
Dfsl_clock.c1390 tmp32 &= ~CCM_CCOSR_CLKO1_EN_MASK; in CLOCK_SetClockOutput1()
1394 tmp32 |= CCM_CCOSR_CLKO1_EN_MASK; in CLOCK_SetClockOutput1()
1438 if ((tmp32 & CCM_CCOSR_CLKO1_EN_MASK) != 0UL) in CLOCK_GetClockOutCLKO1Freq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/drivers/
Dfsl_clock.c1390 tmp32 &= ~CCM_CCOSR_CLKO1_EN_MASK; in CLOCK_SetClockOutput1()
1394 tmp32 |= CCM_CCOSR_CLKO1_EN_MASK; in CLOCK_SetClockOutput1()
1438 if ((tmp32 & CCM_CCOSR_CLKO1_EN_MASK) != 0UL) in CLOCK_GetClockOutCLKO1Freq()
/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1040/
Dclock_config.c455 CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; in BOARD_BootClockRUN()
889 CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; in BOARD_BootClockRUN_600M()
/hal_nxp-latest/mcux/mcux-sdk/boards/evkbimxrt1050/
Dclock_config.c465 CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; in BOARD_BootClockRUN()
904 CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; in BOARD_BootClockRUN_528M()
/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1060/
Dclock_config.c484 CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; in BOARD_BootClockRUN()
937 CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; in BOARD_BootClockRUN_528M()
/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1064/
Dclock_config.c486 CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; in BOARD_BootClockRUN()
941 CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; in BOARD_BootClockRUN_528M()
/hal_nxp-latest/mcux/mcux-sdk/boards/evkcmimxrt1060/
Dclock_config.c483 CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; in BOARD_BootClockRUN()
936 CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; in BOARD_BootClockRUN_528M()
/hal_nxp-latest/mcux/mcux-sdk/boards/evkbmimxrt1060/
Dclock_config.c484 CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; in BOARD_BootClockRUN()
937 CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; in BOARD_BootClockRUN_528M()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h4219 #define CCM_CCOSR_CLKO1_EN_MASK (0x80U) macro
4225 … (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO1_EN_SHIFT)) & CCM_CCOSR_CLKO1_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h4932 #define CCM_CCOSR_CLKO1_EN_MASK (0x80U) macro
4938 … (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO1_EN_SHIFT)) & CCM_CCOSR_CLKO1_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h6129 #define CCM_CCOSR_CLKO1_EN_MASK (0x80U) macro
6135 … (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO1_EN_SHIFT)) & CCM_CCOSR_CLKO1_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h6149 #define CCM_CCOSR_CLKO1_EN_MASK (0x80U) macro
6155 … (((uint32_t)(((uint32_t)(x)) << CCM_CCOSR_CLKO1_EN_SHIFT)) & CCM_CCOSR_CLKO1_EN_MASK)

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