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Searched refs:CCM_ANALOG_TUPLE (Results 1 – 25 of 45) sorted by relevance

12

/hal_nxp-latest/imx/drivers/
Dccm_analog_imx7d.h48 #define CCM_ANALOG_TUPLE(reg, shift) ((offsetof(CCM_ANALOG_Type, reg) & 0xFFFF) | ((s… macro
64 …ccmAnalogPllArmControl = CCM_ANALOG_TUPLE(PLL_ARM, CCM_ANALOG_PLL_ARM_POWERDOWN_SHIFT), /*!<…
65 …ccmAnalogPllDdrControl = CCM_ANALOG_TUPLE(PLL_DDR, CCM_ANALOG_PLL_DDR_POWERDOWN_SHIFT), /*!<…
66 …ccmAnalogPll480Control = CCM_ANALOG_TUPLE(PLL_480, CCM_ANALOG_PLL_480_POWERDOWN_SHIFT), /*!<…
67 …ccmAnalogPllEnetControl = CCM_ANALOG_TUPLE(PLL_ENET, CCM_ANALOG_PLL_ENET_POWERDOWN_SHIFT), /*!<…
68 …ccmAnalogPllAudioControl = CCM_ANALOG_TUPLE(PLL_AUDIO, CCM_ANALOG_PLL_AUDIO_POWERDOWN_SHIFT), /*!<…
69 …ccmAnalogPllVideoControl = CCM_ANALOG_TUPLE(PLL_VIDEO, CCM_ANALOG_PLL_VIDEO_POWERDOWN_SHIFT), /*!<…
81 …ccmAnalogPllArmClock = CCM_ANALOG_TUPLE(PLL_ARM, CCM_ANALOG_PLL_ARM_ENABLE_CLK_SHIFT), …
82 …ccmAnalogPllDdrClock = CCM_ANALOG_TUPLE(PLL_DDR, CCM_ANALOG_PLL_DDR_ENABLE_CLK_SHIFT), …
83 …ccmAnalogPllDdrDiv2Clock = CCM_ANALOG_TUPLE(PLL_DDR, CCM_ANALOG_PLL_DDR_DIV2_ENABLE_CLK_SHIFT),…
[all …]
Dccm_analog_imx6sx.h48 #define CCM_ANALOG_TUPLE(reg, shift) ((offsetof(CCM_ANALOG_Type, reg) & 0xFFFF) | ((s… macro
65 …ccmAnalogPllArmControl = CCM_ANALOG_TUPLE(PLL_ARM, CCM_ANALOG_PLL_ARM_POWERDOWN_SHIFT), /*!<…
66 …ccmAnalogPllUsb1Control = CCM_ANALOG_TUPLE(PLL_USB1, CCM_ANALOG_PLL_USB1_POWER_SHIFT), /*!<…
67 …ccmAnalogPllUsb2Control = CCM_ANALOG_TUPLE(PLL_USB2, CCM_ANALOG_PLL_USB2_POWER_SHIFT), /*!<…
68 …ccmAnalogPllSysControl = CCM_ANALOG_TUPLE(PLL_SYS, CCM_ANALOG_PLL_SYS_POWERDOWN_SHIFT), /*!<…
69 …ccmAnalogPllAudioControl = CCM_ANALOG_TUPLE(PLL_AUDIO, CCM_ANALOG_PLL_AUDIO_POWERDOWN_SHIFT), /*!<…
70 …ccmAnalogPllVideoControl = CCM_ANALOG_TUPLE(PLL_VIDEO, CCM_ANALOG_PLL_VIDEO_POWERDOWN_SHIFT), /*!<…
71 …ccmAnalogPllEnetControl = CCM_ANALOG_TUPLE(PLL_ENET, CCM_ANALOG_PLL_ENET_POWERDOWN_SHIFT), /*!<…
83 …ccmAnalogPllArmClock = CCM_ANALOG_TUPLE(PLL_ARM, CCM_ANALOG_PLL_ARM_ENABLE_SHIFT), …
84 …ccmAnalogPllUsb1Clock = CCM_ANALOG_TUPLE(PLL_USB1, CCM_ANALOG_PLL_USB1_ENABLE_SHIFT), …
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ5/drivers/
Dfsl_clock.h191 #define CCM_ANALOG_TUPLE(reg, shift) ((((reg)&0xFFFFU) << 16U) | (shift)) macro
805 kCLOCK_AudioPll1BypassCtrl = CCM_ANALOG_TUPLE(
807 kCLOCK_AudioPll2BypassCtrl = CCM_ANALOG_TUPLE(
809 kCLOCK_VideoPll1BypassCtrl = CCM_ANALOG_TUPLE(
811 kCLOCK_GpuPLLPwrBypassCtrl = CCM_ANALOG_TUPLE(
813 kCLOCK_VpuPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
815 kCLOCK_ArmPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
818 kCLOCK_SysPll1InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
821 kCLOCK_SysPll1InternalPll2BypassCtrl = CCM_ANALOG_TUPLE(
825 kCLOCK_SysPll2InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD7/drivers/
Dfsl_clock.h191 #define CCM_ANALOG_TUPLE(reg, shift) ((((reg)&0xFFFFU) << 16U) | (shift)) macro
805 kCLOCK_AudioPll1BypassCtrl = CCM_ANALOG_TUPLE(
807 kCLOCK_AudioPll2BypassCtrl = CCM_ANALOG_TUPLE(
809 kCLOCK_VideoPll1BypassCtrl = CCM_ANALOG_TUPLE(
811 kCLOCK_GpuPLLPwrBypassCtrl = CCM_ANALOG_TUPLE(
813 kCLOCK_VpuPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
815 kCLOCK_ArmPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
818 kCLOCK_SysPll1InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
821 kCLOCK_SysPll1InternalPll2BypassCtrl = CCM_ANALOG_TUPLE(
825 kCLOCK_SysPll2InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD6/drivers/
Dfsl_clock.h191 #define CCM_ANALOG_TUPLE(reg, shift) ((((reg)&0xFFFFU) << 16U) | (shift)) macro
805 kCLOCK_AudioPll1BypassCtrl = CCM_ANALOG_TUPLE(
807 kCLOCK_AudioPll2BypassCtrl = CCM_ANALOG_TUPLE(
809 kCLOCK_VideoPll1BypassCtrl = CCM_ANALOG_TUPLE(
811 kCLOCK_GpuPLLPwrBypassCtrl = CCM_ANALOG_TUPLE(
813 kCLOCK_VpuPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
815 kCLOCK_ArmPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
818 kCLOCK_SysPll1InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
821 kCLOCK_SysPll1InternalPll2BypassCtrl = CCM_ANALOG_TUPLE(
825 kCLOCK_SysPll2InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ6/drivers/
Dfsl_clock.h191 #define CCM_ANALOG_TUPLE(reg, shift) ((((reg)&0xFFFFU) << 16U) | (shift)) macro
805 kCLOCK_AudioPll1BypassCtrl = CCM_ANALOG_TUPLE(
807 kCLOCK_AudioPll2BypassCtrl = CCM_ANALOG_TUPLE(
809 kCLOCK_VideoPll1BypassCtrl = CCM_ANALOG_TUPLE(
811 kCLOCK_GpuPLLPwrBypassCtrl = CCM_ANALOG_TUPLE(
813 kCLOCK_VpuPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
815 kCLOCK_ArmPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
818 kCLOCK_SysPll1InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
821 kCLOCK_SysPll1InternalPll2BypassCtrl = CCM_ANALOG_TUPLE(
825 kCLOCK_SysPll2InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ7/drivers/
Dfsl_clock.h191 #define CCM_ANALOG_TUPLE(reg, shift) ((((reg)&0xFFFFU) << 16U) | (shift)) macro
805 kCLOCK_AudioPll1BypassCtrl = CCM_ANALOG_TUPLE(
807 kCLOCK_AudioPll2BypassCtrl = CCM_ANALOG_TUPLE(
809 kCLOCK_VideoPll1BypassCtrl = CCM_ANALOG_TUPLE(
811 kCLOCK_GpuPLLPwrBypassCtrl = CCM_ANALOG_TUPLE(
813 kCLOCK_VpuPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
815 kCLOCK_ArmPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
818 kCLOCK_SysPll1InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
821 kCLOCK_SysPll1InternalPll2BypassCtrl = CCM_ANALOG_TUPLE(
825 kCLOCK_SysPll2InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM4/drivers/
Dfsl_clock.h191 #define CCM_ANALOG_TUPLE(reg, shift) ((((reg)&0xFFFFU) << 16U) | ((shift))) macro
909 CCM_ANALOG_TUPLE(AUDIO_PLL1_GEN_CTRL_OFFSET,
913 CCM_ANALOG_TUPLE(AUDIO_PLL2_GEN_CTRL_OFFSET,
917 CCM_ANALOG_TUPLE(VIDEO_PLL1_GEN_CTRL_OFFSET,
920 kCLOCK_DramPllInternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
923 kCLOCK_GpuPLLPwrBypassCtrl = CCM_ANALOG_TUPLE(
926 kCLOCK_VpuPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
929 kCLOCK_ArmPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
932 kCLOCK_SysPll1InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
935 kCLOCK_SysPll2InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM3/drivers/
Dfsl_clock.h191 #define CCM_ANALOG_TUPLE(reg, shift) ((((reg)&0xFFFFU) << 16U) | ((shift))) macro
909 CCM_ANALOG_TUPLE(AUDIO_PLL1_GEN_CTRL_OFFSET,
913 CCM_ANALOG_TUPLE(AUDIO_PLL2_GEN_CTRL_OFFSET,
917 CCM_ANALOG_TUPLE(VIDEO_PLL1_GEN_CTRL_OFFSET,
920 kCLOCK_DramPllInternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
923 kCLOCK_GpuPLLPwrBypassCtrl = CCM_ANALOG_TUPLE(
926 kCLOCK_VpuPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
929 kCLOCK_ArmPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
932 kCLOCK_SysPll1InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
935 kCLOCK_SysPll2InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM1/drivers/
Dfsl_clock.h191 #define CCM_ANALOG_TUPLE(reg, shift) ((((reg)&0xFFFFU) << 16U) | ((shift))) macro
909 CCM_ANALOG_TUPLE(AUDIO_PLL1_GEN_CTRL_OFFSET,
913 CCM_ANALOG_TUPLE(AUDIO_PLL2_GEN_CTRL_OFFSET,
917 CCM_ANALOG_TUPLE(VIDEO_PLL1_GEN_CTRL_OFFSET,
920 kCLOCK_DramPllInternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
923 kCLOCK_GpuPLLPwrBypassCtrl = CCM_ANALOG_TUPLE(
926 kCLOCK_VpuPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
929 kCLOCK_ArmPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
932 kCLOCK_SysPll1InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
935 kCLOCK_SysPll2InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM6/drivers/
Dfsl_clock.h191 #define CCM_ANALOG_TUPLE(reg, shift) ((((reg)&0xFFFFU) << 16U) | ((shift))) macro
909 CCM_ANALOG_TUPLE(AUDIO_PLL1_GEN_CTRL_OFFSET,
913 CCM_ANALOG_TUPLE(AUDIO_PLL2_GEN_CTRL_OFFSET,
917 CCM_ANALOG_TUPLE(VIDEO_PLL1_GEN_CTRL_OFFSET,
920 kCLOCK_DramPllInternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
923 kCLOCK_GpuPLLPwrBypassCtrl = CCM_ANALOG_TUPLE(
926 kCLOCK_VpuPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
929 kCLOCK_ArmPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
932 kCLOCK_SysPll1InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
935 kCLOCK_SysPll2InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM2/drivers/
Dfsl_clock.h191 #define CCM_ANALOG_TUPLE(reg, shift) ((((reg)&0xFFFFU) << 16U) | ((shift))) macro
909 CCM_ANALOG_TUPLE(AUDIO_PLL1_GEN_CTRL_OFFSET,
913 CCM_ANALOG_TUPLE(AUDIO_PLL2_GEN_CTRL_OFFSET,
917 CCM_ANALOG_TUPLE(VIDEO_PLL1_GEN_CTRL_OFFSET,
920 kCLOCK_DramPllInternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
923 kCLOCK_GpuPLLPwrBypassCtrl = CCM_ANALOG_TUPLE(
926 kCLOCK_VpuPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
929 kCLOCK_ArmPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
932 kCLOCK_SysPll1InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
935 kCLOCK_SysPll2InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM5/drivers/
Dfsl_clock.h191 #define CCM_ANALOG_TUPLE(reg, shift) ((((reg)&0xFFFFU) << 16U) | ((shift))) macro
909 CCM_ANALOG_TUPLE(AUDIO_PLL1_GEN_CTRL_OFFSET,
913 CCM_ANALOG_TUPLE(AUDIO_PLL2_GEN_CTRL_OFFSET,
917 CCM_ANALOG_TUPLE(VIDEO_PLL1_GEN_CTRL_OFFSET,
920 kCLOCK_DramPllInternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
923 kCLOCK_GpuPLLPwrBypassCtrl = CCM_ANALOG_TUPLE(
926 kCLOCK_VpuPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
929 kCLOCK_ArmPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
932 kCLOCK_SysPll1InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
935 kCLOCK_SysPll2InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN5/drivers/
Dfsl_clock.h198 #define CCM_ANALOG_TUPLE(reg, shift) ((((reg)&0xFFFFU) << 16U) | ((shift))) macro
914 CCM_ANALOG_TUPLE(AUDIO_PLL1_GEN_CTRL_OFFSET,
918 CCM_ANALOG_TUPLE(AUDIO_PLL2_GEN_CTRL_OFFSET,
922 CCM_ANALOG_TUPLE(VIDEO_PLL1_GEN_CTRL_OFFSET,
925 kCLOCK_DramPllInternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
928 kCLOCK_ArmPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
931 kCLOCK_SysPll1InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
934 kCLOCK_SysPll2InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
937 kCLOCK_SysPll3InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
950 kCLOCK_AudioPll1Clke = CCM_ANALOG_TUPLE(AUDIO_PLL1_GEN_CTRL_OFFSET,
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN3/drivers/
Dfsl_clock.h198 #define CCM_ANALOG_TUPLE(reg, shift) ((((reg)&0xFFFFU) << 16U) | ((shift))) macro
914 CCM_ANALOG_TUPLE(AUDIO_PLL1_GEN_CTRL_OFFSET,
918 CCM_ANALOG_TUPLE(AUDIO_PLL2_GEN_CTRL_OFFSET,
922 CCM_ANALOG_TUPLE(VIDEO_PLL1_GEN_CTRL_OFFSET,
925 kCLOCK_DramPllInternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
928 kCLOCK_ArmPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
931 kCLOCK_SysPll1InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
934 kCLOCK_SysPll2InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
937 kCLOCK_SysPll3InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
950 kCLOCK_AudioPll1Clke = CCM_ANALOG_TUPLE(AUDIO_PLL1_GEN_CTRL_OFFSET,
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN1/drivers/
Dfsl_clock.h198 #define CCM_ANALOG_TUPLE(reg, shift) ((((reg)&0xFFFFU) << 16U) | ((shift))) macro
914 CCM_ANALOG_TUPLE(AUDIO_PLL1_GEN_CTRL_OFFSET,
918 CCM_ANALOG_TUPLE(AUDIO_PLL2_GEN_CTRL_OFFSET,
922 CCM_ANALOG_TUPLE(VIDEO_PLL1_GEN_CTRL_OFFSET,
925 kCLOCK_DramPllInternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
928 kCLOCK_ArmPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
931 kCLOCK_SysPll1InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
934 kCLOCK_SysPll2InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
937 kCLOCK_SysPll3InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
950 kCLOCK_AudioPll1Clke = CCM_ANALOG_TUPLE(AUDIO_PLL1_GEN_CTRL_OFFSET,
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN2/drivers/
Dfsl_clock.h198 #define CCM_ANALOG_TUPLE(reg, shift) ((((reg)&0xFFFFU) << 16U) | ((shift))) macro
914 CCM_ANALOG_TUPLE(AUDIO_PLL1_GEN_CTRL_OFFSET,
918 CCM_ANALOG_TUPLE(AUDIO_PLL2_GEN_CTRL_OFFSET,
922 CCM_ANALOG_TUPLE(VIDEO_PLL1_GEN_CTRL_OFFSET,
925 kCLOCK_DramPllInternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
928 kCLOCK_ArmPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
931 kCLOCK_SysPll1InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
934 kCLOCK_SysPll2InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
937 kCLOCK_SysPll3InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
950 kCLOCK_AudioPll1Clke = CCM_ANALOG_TUPLE(AUDIO_PLL1_GEN_CTRL_OFFSET,
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN6/drivers/
Dfsl_clock.h198 #define CCM_ANALOG_TUPLE(reg, shift) ((((reg)&0xFFFFU) << 16U) | ((shift))) macro
914 CCM_ANALOG_TUPLE(AUDIO_PLL1_GEN_CTRL_OFFSET,
918 CCM_ANALOG_TUPLE(AUDIO_PLL2_GEN_CTRL_OFFSET,
922 CCM_ANALOG_TUPLE(VIDEO_PLL1_GEN_CTRL_OFFSET,
925 kCLOCK_DramPllInternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
928 kCLOCK_ArmPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
931 kCLOCK_SysPll1InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
934 kCLOCK_SysPll2InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
937 kCLOCK_SysPll3InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
950 kCLOCK_AudioPll1Clke = CCM_ANALOG_TUPLE(AUDIO_PLL1_GEN_CTRL_OFFSET,
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN4/drivers/
Dfsl_clock.h198 #define CCM_ANALOG_TUPLE(reg, shift) ((((reg)&0xFFFFU) << 16U) | ((shift))) macro
914 CCM_ANALOG_TUPLE(AUDIO_PLL1_GEN_CTRL_OFFSET,
918 CCM_ANALOG_TUPLE(AUDIO_PLL2_GEN_CTRL_OFFSET,
922 CCM_ANALOG_TUPLE(VIDEO_PLL1_GEN_CTRL_OFFSET,
925 kCLOCK_DramPllInternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
928 kCLOCK_ArmPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
931 kCLOCK_SysPll1InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
934 kCLOCK_SysPll2InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
937 kCLOCK_SysPll3InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
950 kCLOCK_AudioPll1Clke = CCM_ANALOG_TUPLE(AUDIO_PLL1_GEN_CTRL_OFFSET,
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML3/drivers/
Dfsl_clock.h216 #define CCM_ANALOG_TUPLE(reg, shift) ((((reg)&0xFFFFU) << 16U) | ((shift))) macro
1170 CCM_ANALOG_TUPLE(AUDIO_PLL1_GEN_CTRL_OFFSET,
1174 CCM_ANALOG_TUPLE(AUDIO_PLL2_GEN_CTRL_OFFSET,
1178 CCM_ANALOG_TUPLE(VIDEO_PLL1_GEN_CTRL_OFFSET,
1181 kCLOCK_DramPllInternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
1184 kCLOCK_ArmPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
1187 kCLOCK_SysPll1InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
1190 kCLOCK_SysPll2InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
1193 kCLOCK_SysPll3InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
1206 kCLOCK_AudioPll1Clke = CCM_ANALOG_TUPLE(AUDIO_PLL1_GEN_CTRL_OFFSET,
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML4/drivers/
Dfsl_clock.h216 #define CCM_ANALOG_TUPLE(reg, shift) ((((reg)&0xFFFFU) << 16U) | ((shift))) macro
1170 CCM_ANALOG_TUPLE(AUDIO_PLL1_GEN_CTRL_OFFSET,
1174 CCM_ANALOG_TUPLE(AUDIO_PLL2_GEN_CTRL_OFFSET,
1178 CCM_ANALOG_TUPLE(VIDEO_PLL1_GEN_CTRL_OFFSET,
1181 kCLOCK_DramPllInternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
1184 kCLOCK_ArmPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
1187 kCLOCK_SysPll1InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
1190 kCLOCK_SysPll2InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
1193 kCLOCK_SysPll3InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
1206 kCLOCK_AudioPll1Clke = CCM_ANALOG_TUPLE(AUDIO_PLL1_GEN_CTRL_OFFSET,
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML6/drivers/
Dfsl_clock.h216 #define CCM_ANALOG_TUPLE(reg, shift) ((((reg)&0xFFFFU) << 16U) | ((shift))) macro
1170 CCM_ANALOG_TUPLE(AUDIO_PLL1_GEN_CTRL_OFFSET,
1174 CCM_ANALOG_TUPLE(AUDIO_PLL2_GEN_CTRL_OFFSET,
1178 CCM_ANALOG_TUPLE(VIDEO_PLL1_GEN_CTRL_OFFSET,
1181 kCLOCK_DramPllInternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
1184 kCLOCK_ArmPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
1187 kCLOCK_SysPll1InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
1190 kCLOCK_SysPll2InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
1193 kCLOCK_SysPll3InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
1206 kCLOCK_AudioPll1Clke = CCM_ANALOG_TUPLE(AUDIO_PLL1_GEN_CTRL_OFFSET,
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML8/drivers/
Dfsl_clock.h222 #define CCM_ANALOG_TUPLE(reg, shift) ((((reg)&0xFFFFU) << 16U) | ((shift))) macro
1178 CCM_ANALOG_TUPLE(AUDIO_PLL1_GEN_CTRL_OFFSET,
1182 CCM_ANALOG_TUPLE(AUDIO_PLL2_GEN_CTRL_OFFSET,
1186 CCM_ANALOG_TUPLE(VIDEO_PLL1_GEN_CTRL_OFFSET,
1189 kCLOCK_DramPllInternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
1192 kCLOCK_ArmPllPwrBypassCtrl = CCM_ANALOG_TUPLE(
1195 kCLOCK_SysPll1InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
1198 kCLOCK_SysPll2InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
1201 kCLOCK_SysPll3InternalPll1BypassCtrl = CCM_ANALOG_TUPLE(
1214 kCLOCK_AudioPll1Clke = CCM_ANALOG_TUPLE(AUDIO_PLL1_GEN_CTRL_OFFSET,
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/drivers/
Dfsl_clock.h97 #define CCM_ANALOG_TUPLE(reg, shift) ((((reg)&0xFFFU) << 16U) | (shift)) macro
1292 …kCLOCK_PllArm = CCM_ANALOG_TUPLE(PLL_ARM_OFFSET, CCM_ANALOG_PLL_ARM_ENABLE_SHIFT), /*!< PLL …
1293 …kCLOCK_PllSys = CCM_ANALOG_TUPLE(PLL_SYS_OFFSET, CCM_ANALOG_PLL_SYS_ENABLE_SHIFT), /*!< PLL …
1294 …kCLOCK_PllUsb1 = CCM_ANALOG_TUPLE(PLL_USB1_OFFSET, CCM_ANALOG_PLL_USB1_ENABLE_SHIFT), /*!< PLL …
1295 …kCLOCK_PllAudio = CCM_ANALOG_TUPLE(PLL_AUDIO_OFFSET, CCM_ANALOG_PLL_AUDIO_ENABLE_SHIFT), /*!< PLL …
1296 …kCLOCK_PllVideo = CCM_ANALOG_TUPLE(PLL_VIDEO_OFFSET, CCM_ANALOG_PLL_VIDEO_ENABLE_SHIFT), /*!< PLL …
1298 …kCLOCK_PllEnet = CCM_ANALOG_TUPLE(PLL_ENET_OFFSET, CCM_ANALOG_PLL_ENET_ENABLE_SHIFT), …
1299 …kCLOCK_PllEnet2 = CCM_ANALOG_TUPLE(PLL_ENET_OFFSET, CCM_ANALOG_PLL_ENET_ENET2_REF_EN_SHIFT), …
1300 …kCLOCK_PllEnet25M = CCM_ANALOG_TUPLE(PLL_ENET_OFFSET, CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_SHIFT), …
1302 …kCLOCK_PllUsb2 = CCM_ANALOG_TUPLE(PLL_USB2_OFFSET, CCM_ANALOG_PLL_USB2_ENABLE_SHIFT), /*!< PLL USB…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/drivers/
Dfsl_clock.h97 #define CCM_ANALOG_TUPLE(reg, shift) ((((reg)&0xFFFU) << 16U) | (shift)) macro
1293 …kCLOCK_PllArm = CCM_ANALOG_TUPLE(PLL_ARM_OFFSET, CCM_ANALOG_PLL_ARM_ENABLE_SHIFT), /*!< PLL …
1294 …kCLOCK_PllSys = CCM_ANALOG_TUPLE(PLL_SYS_OFFSET, CCM_ANALOG_PLL_SYS_ENABLE_SHIFT), /*!< PLL …
1295 …kCLOCK_PllUsb1 = CCM_ANALOG_TUPLE(PLL_USB1_OFFSET, CCM_ANALOG_PLL_USB1_ENABLE_SHIFT), /*!< PLL …
1296 …kCLOCK_PllAudio = CCM_ANALOG_TUPLE(PLL_AUDIO_OFFSET, CCM_ANALOG_PLL_AUDIO_ENABLE_SHIFT), /*!< PLL …
1297 …kCLOCK_PllVideo = CCM_ANALOG_TUPLE(PLL_VIDEO_OFFSET, CCM_ANALOG_PLL_VIDEO_ENABLE_SHIFT), /*!< PLL …
1299 …kCLOCK_PllEnet = CCM_ANALOG_TUPLE(PLL_ENET_OFFSET, CCM_ANALOG_PLL_ENET_ENABLE_SHIFT), …
1300 …kCLOCK_PllEnet2 = CCM_ANALOG_TUPLE(PLL_ENET_OFFSET, CCM_ANALOG_PLL_ENET_ENET2_REF_EN_SHIFT), …
1301 …kCLOCK_PllEnet25M = CCM_ANALOG_TUPLE(PLL_ENET_OFFSET, CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_SHIFT), …
1303 …kCLOCK_PllUsb2 = CCM_ANALOG_TUPLE(PLL_USB2_OFFSET, CCM_ANALOG_PLL_USB2_ENABLE_SHIFT), /*!< PLL USB…

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