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Searched refs:CAN_CTRL1_PN_IDFS_MASK (Results 1 – 25 of 37) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K148_FLEXCAN.h870 #define CAN_CTRL1_PN_IDFS_MASK (0xCU) macro
873 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PN_IDFS_SHIFT)) & CAN_CTRL1_PN_IDFS_MASK)
DS32K118_FLEXCAN.h862 #define CAN_CTRL1_PN_IDFS_MASK (0xCU) macro
865 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PN_IDFS_SHIFT)) & CAN_CTRL1_PN_IDFS_MASK)
DS32K116_FLEXCAN.h862 #define CAN_CTRL1_PN_IDFS_MASK (0xCU) macro
865 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PN_IDFS_SHIFT)) & CAN_CTRL1_PN_IDFS_MASK)
DS32K142W_FLEXCAN.h884 #define CAN_CTRL1_PN_IDFS_MASK (0xCU) macro
887 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PN_IDFS_SHIFT)) & CAN_CTRL1_PN_IDFS_MASK)
DS32K146_FLEXCAN.h880 #define CAN_CTRL1_PN_IDFS_MASK (0xCU) macro
883 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PN_IDFS_SHIFT)) & CAN_CTRL1_PN_IDFS_MASK)
DS32K142_FLEXCAN.h876 #define CAN_CTRL1_PN_IDFS_MASK (0xCU) macro
879 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PN_IDFS_SHIFT)) & CAN_CTRL1_PN_IDFS_MASK)
DS32K144_FLEXCAN.h880 #define CAN_CTRL1_PN_IDFS_MASK (0xCU) macro
883 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PN_IDFS_SHIFT)) & CAN_CTRL1_PN_IDFS_MASK)
DS32K144W_FLEXCAN.h884 #define CAN_CTRL1_PN_IDFS_MASK (0xCU) macro
887 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PN_IDFS_SHIFT)) & CAN_CTRL1_PN_IDFS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h3338 #define CAN_CTRL1_PN_IDFS_MASK (0xCU) macro
3346 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PN_IDFS_SHIFT)) & CAN_CTRL1_PN_IDFS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h3338 #define CAN_CTRL1_PN_IDFS_MASK (0xCU) macro
3346 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PN_IDFS_SHIFT)) & CAN_CTRL1_PN_IDFS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h3338 #define CAN_CTRL1_PN_IDFS_MASK (0xCU) macro
3346 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PN_IDFS_SHIFT)) & CAN_CTRL1_PN_IDFS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h3338 #define CAN_CTRL1_PN_IDFS_MASK (0xCU) macro
3346 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PN_IDFS_SHIFT)) & CAN_CTRL1_PN_IDFS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h3338 #define CAN_CTRL1_PN_IDFS_MASK (0xCU) macro
3346 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PN_IDFS_SHIFT)) & CAN_CTRL1_PN_IDFS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/
DMCXA155.h3338 #define CAN_CTRL1_PN_IDFS_MASK (0xCU) macro
3346 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PN_IDFS_SHIFT)) & CAN_CTRL1_PN_IDFS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/
DMCXW716C.h4979 #define CAN_CTRL1_PN_IDFS_MASK (0xCU) macro
4988 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PN_IDFS_SHIFT)) & CAN_CTRL1_PN_IDFS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h7485 #define CAN_CTRL1_PN_IDFS_MASK (0xCU) macro
7493 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PN_IDFS_SHIFT)) & CAN_CTRL1_PN_IDFS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h7467 #define CAN_CTRL1_PN_IDFS_MASK (0xCU) macro
7475 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PN_IDFS_SHIFT)) & CAN_CTRL1_PN_IDFS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/
DMCXW727C_cm33_core0.h5195 #define CAN_CTRL1_PN_IDFS_MASK (0xCU) macro
5203 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PN_IDFS_SHIFT)) & CAN_CTRL1_PN_IDFS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h9781 #define CAN_CTRL1_PN_IDFS_MASK (0xCU) macro
9789 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PN_IDFS_SHIFT)) & CAN_CTRL1_PN_IDFS_MASK)
DMCXN546_cm33_core1.h9781 #define CAN_CTRL1_PN_IDFS_MASK (0xCU) macro
9789 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PN_IDFS_SHIFT)) & CAN_CTRL1_PN_IDFS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h9781 #define CAN_CTRL1_PN_IDFS_MASK (0xCU) macro
9789 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PN_IDFS_SHIFT)) & CAN_CTRL1_PN_IDFS_MASK)
DMCXN547_cm33_core1.h9781 #define CAN_CTRL1_PN_IDFS_MASK (0xCU) macro
9789 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PN_IDFS_SHIFT)) & CAN_CTRL1_PN_IDFS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h9815 #define CAN_CTRL1_PN_IDFS_MASK (0xCU) macro
9823 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PN_IDFS_SHIFT)) & CAN_CTRL1_PN_IDFS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h9815 #define CAN_CTRL1_PN_IDFS_MASK (0xCU) macro
9823 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PN_IDFS_SHIFT)) & CAN_CTRL1_PN_IDFS_MASK)
DMCXN946_cm33_core1.h9815 #define CAN_CTRL1_PN_IDFS_MASK (0xCU) macro
9823 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL1_PN_IDFS_SHIFT)) & CAN_CTRL1_PN_IDFS_MASK)

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