| /hal_nxp-latest/mcux/mcux-sdk/CMSIS/DSP/Source/TransformFunctions/ |
| D | arm_cfft_radix4_q15.c | 157 q31_t C1, C2, C3, out1, out2; in arm_radix4_butterfly_q15() local
306 C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic)); in arm_radix4_butterfly_q15()
311 out1 = __SMUAD(C3, R) >> 16U; in arm_radix4_butterfly_q15()
313 out2 = __SMUSDX(C3, R); in arm_radix4_butterfly_q15()
316 out1 = __SMUSDX(R, C3) >> 16U; in arm_radix4_butterfly_q15()
318 out2 = __SMUAD(C3, R); in arm_radix4_butterfly_q15()
351 C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic)); in arm_radix4_butterfly_q15()
463 out1 = __SMUAD(C3, R) >> 16U; in arm_radix4_butterfly_q15()
464 out2 = __SMUSDX(C3, R); in arm_radix4_butterfly_q15()
466 out1 = __SMUSDX(R, C3) >> 16U; in arm_radix4_butterfly_q15()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/uart/ |
| D | fsl_uart.c | 574 base->C3 |= (uint8_t)(mask >> 16); in UART_EnableInterrupts()
602 base->C3 &= ~(uint8_t)(mask >> 16); in UART_DisableInterrupts()
635 temp |= ((uint32_t)(base->C3) << 16); in UART_GetEnabledInterrupts()
995 base->C3 |= ((uint8_t)UART_C3_ORIE_MASK | (uint8_t)UART_C3_FEIE_MASK); in UART_TransferStartRingBuffer()
999 base->C3 |= (uint8_t)UART_C3_PEIE_MASK; in UART_TransferStartRingBuffer()
1022 base->C3 &= ~((uint8_t)UART_C3_ORIE_MASK | (uint8_t)UART_C3_FEIE_MASK); in UART_TransferStopRingBuffer()
1026 base->C3 &= ~(uint8_t)UART_C3_PEIE_MASK; in UART_TransferStopRingBuffer()
1289 base->C3 |= ((uint8_t)UART_C3_ORIE_MASK | (uint8_t)UART_C3_FEIE_MASK); in UART_TransferReceiveNonBlocking()
1294 base->C3 |= (uint8_t)UART_C3_PEIE_MASK; in UART_TransferReceiveNonBlocking()
1332 base->C3 &= ~((uint8_t)UART_C3_ORIE_MASK | (uint8_t)UART_C3_FEIE_MASK); in UART_TransferAbortReceive()
[all …]
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| D | fsl_uart.h | 398 base->C3 |= (uint8_t)UART_C3_T8_MASK; in UART_Set9thTransmitBit()
408 base->C3 &= ~(uint8_t)UART_C3_T8_MASK; in UART_Clear9thTransmitBit()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/spi/ |
| D | fsl_spi.c | 231 rxSize = (base->C3 & SPI_C3_RNFULLF_MARK_MASK) >> SPI_C3_RNFULLF_MARK_SHIFT; in SPI_GetWatermark()
475 … base->C3 = SPI_C3_TNEAREF_MARK(config->txWatermark) | SPI_C3_RNFULLF_MARK(config->rxWatermark) | in SPI_MasterInit()
577 … base->C3 = SPI_C3_TNEAREF_MARK(config->txWatermark) | SPI_C3_RNFULLF_MARK(config->rxWatermark) | in SPI_SlaveInit()
667 base->C3 |= SPI_C3_RNFULLIEN_MASK; in SPI_EnableInterrupts()
673 base->C3 |= SPI_C3_TNEARIEN_MASK; in SPI_EnableInterrupts()
716 base->C3 &= (uint8_t)(~SPI_C3_RNFULLIEN_MASK); in SPI_DisableInterrupts()
722 base->C3 &= (uint8_t)(~SPI_C3_TNEARIEN_MASK); in SPI_DisableInterrupts()
861 base->C3 |= SPI_C3_FIFOMODE_MASK; in SPI_EnableFIFO()
865 base->C3 &= (uint8_t)(~SPI_C3_FIFOMODE_MASK); in SPI_EnableFIFO()
941 base->C3 &= (uint8_t)(~SPI_C3_FIFOMODE_MASK); in SPI_MasterTransferBlocking()
[all …]
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| D | fsl_spi_dma.c | 165 base->C3 &= (uint8_t)(~SPI_C3_FIFOMODE_MASK); in SPI_MasterTransferCreateHandleDMA()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/lpsci/ |
| D | fsl_lpsci.c | 439 base->C3 |= (mask >> 16); in LPSCI_EnableInterrupts()
450 base->C3 &= ~(mask >> 16); in LPSCI_DisableInterrupts()
456 temp = base->BDH | ((uint32_t)(base->C2) << 8) | ((uint32_t)(base->C3) << 16); in LPSCI_GetEnabledInterrupts()
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| /hal_nxp-latest/mcux/mcux-sdk/components/video/camera/receiver/isi/ |
| D | fsl_isi_camera_adapter.c | 282 .C3 = 0.0f, in ISI_ADAPTER_InitExt()
298 .C3 = -0.071f, in ISI_ADAPTER_InitExt()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/isi/ |
| D | fsl_isi.c | 410 …(ISI_ConvertFloat(config->C3, 2, 8) << ISI_CHNL_CSC_COEFF4_C3_SHIFT) | ISI_CHNL_CSC_COEFF4_D1(conf… in ISI_SetColorSpaceConversionConfig()
455 config->C3 = 0.0f; in ISI_ColorSpaceConversionGetDefaultConfig()
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| D | fsl_isi.h | 225 float C3; /*!< Must be in the range of [-3.99609375, 3.99609375]. */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKW20Z4/ |
| D | system_MKW20Z4.c | 129 MCG->C3 = *((uint8_t*)SLOW_TRIM_ADDRESS); in SystemInit()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKW30Z4/ |
| D | system_MKW30Z4.c | 129 MCG->C3 = *((uint8_t*)SLOW_TRIM_ADDRESS); in SystemInit()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKW40Z4/ |
| D | system_MKW40Z4.c | 129 MCG->C3 = *((uint8_t*)SLOW_TRIM_ADDRESS); in SystemInit()
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| /hal_nxp-latest/mcux/mcux-sdk/cmsis_drivers/spi/ |
| D | fsl_spi_cmsis.c | 506 SPI->resource->base->C3 &= ~(uint8_t)SPI_C3_FIFOMODE_MASK; in SPI_DMAReceive()
571 SPI->resource->base->C3 &= ~(uint8_t)SPI_C3_FIFOMODE_MASK; in SPI_DMATransfer()
972 SPI->resource->base->C3 &= ~(uint8_t)SPI_C3_FIFOMODE_MASK; in SPI_InterruptSend()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/acmp/ |
| D | fsl_acmp.c | 661 base->C3 = tmp32; in ACMP_SetDiscreteModeConfig()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/pxp/ |
| D | fsl_pxp.h | 538 float C3; /*!< C3. */ member
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| D | fsl_pxp.c | 800 …(PXP_ConvertFloat(config->C3, PXP_CSC2_COEF_INT_WIDTH, PXP_CSC2_COEF_FRAC_WIDTH) << PXP_CSC2_COEF4… in PXP_SetCsc2Config()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKL25Z4/ |
| D | MKL25Z4.h | 1997 __IO uint8_t C3; /**< MCG Control 3 Register, offset: 0x2 */ member
4468 __IO uint8_t C3; /**< UART Control Register 3, offset: 0x6 */ member
4707 __IO uint8_t C3; /**< UART Control Register 3, offset: 0x6 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z4/ |
| D | MKE04Z4.h | 3095 __IO uint8_t C3; /**< ICS Control Register 3, offset: 0x2 */ member
5425 __IO uint8_t C3; /**< UART Control Register 3, offset: 0x6 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE02Z4/ |
| D | MKE02Z4.h | 3167 __IO uint8_t C3; /**< ICS Control Register 3, offset: 0x2 */ member
5655 __IO uint8_t C3; /**< UART Control Register 3, offset: 0x6 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z1284/ |
| D | MKE04Z1284.h | 3137 __IO uint8_t C3; /**< ICS Control Register 3, offset: 0x2 */ member
6170 __IO uint8_t C3; /**< UART Control Register 3, offset: 0x6 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE06Z4/ |
| D | MKE06Z4.h | 3137 __IO uint8_t C3; /**< ICS Control Register 3, offset: 0x2 */ member
6958 __IO uint8_t C3; /**< UART Control Register 3, offset: 0x6 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKM14ZA5/ |
| D | MKM14ZA5.h | 5903 __IO uint8_t C3; /**< MCG Control 3 Register, offset: 0x2 */ member
10752 __IO uint8_t C3; /**< SPI control register 3, offset: 0xB */ member
12176 __IO uint8_t C3; /**< UART Control Register 3, offset: 0x6 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXC141/ |
| D | MCXC141.h | 8535 …__IO uint8_t C3; /**< SPI control register 3, offset: 0xB, availab… member
9410 __IO uint8_t C3; /**< UART Control Register 3, offset: 0x6 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXC142/ |
| D | MCXC142.h | 8533 …__IO uint8_t C3; /**< SPI control register 3, offset: 0xB, availab… member
9408 __IO uint8_t C3; /**< UART Control Register 3, offset: 0x6 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKL17Z644/ |
| D | MKL17Z644.h | 7606 __IO uint8_t C3; /**< SPI control register 3, offset: 0xB */ member
8364 __IO uint8_t C3; /**< UART Control Register 3, offset: 0x6 */ member
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