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Searched refs:ASYNC_CLK_CTRL0 (Results 1 – 18 of 18) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54114/drivers/
Dfsl_clock.h162 #define ASYNC_CLK_CTRL0 2 macro
242 kCLOCK_Ct32b3 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 13),
243 kCLOCK_Ct32b4 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 14)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54113/drivers/
Dfsl_clock.h162 #define ASYNC_CLK_CTRL0 2 macro
242 kCLOCK_Ct32b3 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 13),
243 kCLOCK_Ct32b4 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 14)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54628/drivers/
Dfsl_clock.h313 #define ASYNC_CLK_CTRL0 3 macro
521 kCLOCK_Ct32b3 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 13), /*!< Clock gate name: Ct32b3. */
523 kCLOCK_Ct32b4 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 14) /*!< Clock gate name: Ct32b4. */
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S005/drivers/
Dfsl_clock.h301 #define ASYNC_CLK_CTRL0 3 macro
507 kCLOCK_Ct32b3 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 13), /*!< Clock gate name: Ct32b3. */
509 kCLOCK_Ct32b4 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 14) /*!< Clock gate name: Ct32b4. */
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S018/drivers/
Dfsl_clock.h301 #define ASYNC_CLK_CTRL0 3 macro
507 kCLOCK_Ct32b3 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 13), /*!< Clock gate name: Ct32b3. */
509 kCLOCK_Ct32b4 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 14) /*!< Clock gate name: Ct32b4. */
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S016/drivers/
Dfsl_clock.h301 #define ASYNC_CLK_CTRL0 3 macro
507 kCLOCK_Ct32b3 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 13), /*!< Clock gate name: Ct32b3. */
509 kCLOCK_Ct32b4 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 14) /*!< Clock gate name: Ct32b4. */
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54618/drivers/
Dfsl_clock.h313 #define ASYNC_CLK_CTRL0 3U macro
521 kCLOCK_Ct32b3 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 13), /*!< Clock gate name: Ct32b3. */
523 kCLOCK_Ct32b4 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 14) /*!< Clock gate name: Ct32b4. */
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54607/drivers/
Dfsl_clock.h313 #define ASYNC_CLK_CTRL0 3U macro
521 kCLOCK_Ct32b3 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 13), /*!< Clock gate name: Ct32b3. */
523 kCLOCK_Ct32b4 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 14) /*!< Clock gate name: Ct32b4. */
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54605/drivers/
Dfsl_clock.h313 #define ASYNC_CLK_CTRL0 3U macro
521 kCLOCK_Ct32b3 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 13), /*!< Clock gate name: Ct32b3. */
523 kCLOCK_Ct32b4 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 14) /*!< Clock gate name: Ct32b4. */
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54608/drivers/
Dfsl_clock.h313 #define ASYNC_CLK_CTRL0 3U macro
521 kCLOCK_Ct32b3 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 13), /*!< Clock gate name: Ct32b3. */
523 kCLOCK_Ct32b4 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 14) /*!< Clock gate name: Ct32b4. */
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54018M/drivers/
Dfsl_clock.h301 #define ASYNC_CLK_CTRL0 3 macro
505 kCLOCK_Ct32b3 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 13), /*!< Clock gate name: Ct32b3. */
507 kCLOCK_Ct32b4 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 14) /*!< Clock gate name: Ct32b4 */
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54005/drivers/
Dfsl_clock.h301 #define ASYNC_CLK_CTRL0 3 macro
505 kCLOCK_Ct32b3 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 13), /*!< Clock gate name: Ct32b3. */
507 kCLOCK_Ct32b4 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 14) /*!< Clock gate name: Ct32b4. */
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54016/drivers/
Dfsl_clock.h301 #define ASYNC_CLK_CTRL0 3 macro
505 kCLOCK_Ct32b3 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 13), /*!< Clock gate name: Ct32b3. */
507 kCLOCK_Ct32b4 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 14) /*!< Clock gate name: Ct32b4. */
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54606/drivers/
Dfsl_clock.h313 #define ASYNC_CLK_CTRL0 3U macro
521 kCLOCK_Ct32b3 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 13), /*!< Clock gate name: Ct32b3. */
523 kCLOCK_Ct32b4 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 14) /*!< Clock gate name: Ct32b4. */
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54018/drivers/
Dfsl_clock.h301 #define ASYNC_CLK_CTRL0 3 macro
505 kCLOCK_Ct32b3 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 13), /*!< Clock gate name: Ct32b3. */
507 kCLOCK_Ct32b4 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 14) /*!< Clock gate name: Ct32b4. */
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54616/drivers/
Dfsl_clock.h313 #define ASYNC_CLK_CTRL0 3U macro
521 kCLOCK_Ct32b3 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 13), /*!< Clock gate name: Ct32b3. */
523 kCLOCK_Ct32b4 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 14) /*!< Clock gate name: Ct32b4. */
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S018M/drivers/
Dfsl_clock.h301 #define ASYNC_CLK_CTRL0 3 macro
507 kCLOCK_Ct32b3 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 13), /*!< Clock gate name: Ct32b3. */
509 kCLOCK_Ct32b4 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 14) /*!< Clock gate name: Ct32b4. */
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC51U68/drivers/
Dfsl_clock.h157 #define ASYNC_CLK_CTRL0 2 macro
285 kCLOCK_Ctimer3 = CLK_GATE_DEFINE(ASYNC_CLK_CTRL0, 13), /*!< Clock gate name: Ctimer3. */