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Searched refs:TMR2_BASE (Results 1 – 25 of 26) sorted by relevance

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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKM14ZA5/
DMKM14ZA5.h12140 #define TMR2_BASE (0x40059000u) macro
12142 #define TMR2 ((TMR_Type *)TMR2_BASE)
12148 #define TMR_BASE_ADDRS { TMR0_BASE, TMR1_BASE, TMR2_BASE, TMR3_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKM34ZA5/
DMKM34ZA5.h16841 #define TMR2_BASE (0x40059000u) macro
16843 #define TMR2 ((TMR_Type *)TMR2_BASE)
16849 #define TMR_BASE_ADDRS { TMR0_BASE, TMR1_BASE, TMR2_BASE, TMR3_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKM33ZA5/
DMKM33ZA5.h16845 #define TMR2_BASE (0x40059000u) macro
16847 #define TMR2 ((TMR_Type *)TMR2_BASE)
16853 #define TMR_BASE_ADDRS { TMR0_BASE, TMR1_BASE, TMR2_BASE, TMR3_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKM35Z7/
DMKM35Z7.h18257 #define TMR2_BASE (0x40059000u) macro
18259 #define TMR2 ((TMR_Type *)TMR2_BASE)
18265 #define TMR_BASE_ADDRS { TMR0_BASE, TMR1_BASE, TMR2_BASE, TMR3_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MKM34Z7/
DMKM34Z7.h18389 #define TMR2_BASE (0x40059000u) macro
18391 #define TMR2 ((TMR_Type *)TMR2_BASE)
18399 TMR0_BASE, TMR1_BASE, TMR2_BASE, TMR3_BASE \
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h37344 #define TMR2_BASE (0x401E0000u) macro
37346 #define TMR2 ((TMR_Type *)TMR2_BASE)
37348 #define TMR_BASE_ADDRS { 0u, TMR1_BASE, TMR2_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h37323 #define TMR2_BASE (0x401E0000u) macro
37325 #define TMR2 ((TMR_Type *)TMR2_BASE)
37327 #define TMR_BASE_ADDRS { 0u, TMR1_BASE, TMR2_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h40397 #define TMR2_BASE (0x401E0000u) macro
40399 #define TMR2 ((TMR_Type *)TMR2_BASE)
40409 #define TMR_BASE_ADDRS { 0u, TMR1_BASE, TMR2_BASE, TMR3_BASE, TMR4_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h38881 #define TMR2_BASE (0x401E0000u) macro
38883 #define TMR2 ((TMR_Type *)TMR2_BASE)
38893 #define TMR_BASE_ADDRS { 0u, TMR1_BASE, TMR2_BASE, TMR3_BASE, TMR4_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h41281 #define TMR2_BASE (0x401E0000u) macro
41283 #define TMR2 ((TMR_Type *)TMR2_BASE)
41293 #define TMR_BASE_ADDRS { 0u, TMR1_BASE, TMR2_BASE, TMR3_BASE, TMR4_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h43147 #define TMR2_BASE (0x401E0000u) macro
43149 #define TMR2 ((TMR_Type *)TMR2_BASE)
43159 #define TMR_BASE_ADDRS { 0u, TMR1_BASE, TMR2_BASE, TMR3_BASE, TMR4_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h43807 #define TMR2_BASE (0x401E0000u) macro
43809 #define TMR2 ((TMR_Type *)TMR2_BASE)
43819 #define TMR_BASE_ADDRS { 0u, TMR1_BASE, TMR2_BASE, TMR3_BASE, TMR4_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h45475 #define TMR2_BASE (0x401E0000u) macro
45477 #define TMR2 ((TMR_Type *)TMR2_BASE)
45487 #define TMR_BASE_ADDRS { 0u, TMR1_BASE, TMR2_BASE, TMR3_BASE, TMR4_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h45411 #define TMR2_BASE (0x401E0000u) macro
45413 #define TMR2 ((TMR_Type *)TMR2_BASE)
45423 #define TMR_BASE_ADDRS { 0u, TMR1_BASE, TMR2_BASE, TMR3_BASE, TMR4_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h73234 #define TMR2_BASE (0x40160000u) macro
73236 #define TMR2 ((TMR_Type *)TMR2_BASE)
73246 #define TMR_BASE_ADDRS { 0u, TMR1_BASE, TMR2_BASE, TMR3_BASE, TMR4_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm7.h73234 #define TMR2_BASE (0x40160000u) macro
73236 #define TMR2 ((TMR_Type *)TMR2_BASE)
73246 #define TMR_BASE_ADDRS { 0u, TMR1_BASE, TMR2_BASE, TMR3_BASE, TMR4_BASE }
DMIMXRT1175_cm4.h74136 #define TMR2_BASE (0x40160000u) macro
74138 #define TMR2 ((TMR_Type *)TMR2_BASE)
74148 #define TMR_BASE_ADDRS { 0u, TMR1_BASE, TMR2_BASE, TMR3_BASE, TMR4_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h72732 #define TMR2_BASE (0x40160000u) macro
72734 #define TMR2 ((TMR_Type *)TMR2_BASE)
72744 #define TMR_BASE_ADDRS { 0u, TMR1_BASE, TMR2_BASE, TMR3_BASE, TMR4_BASE }
DMIMXRT1165_cm4.h73634 #define TMR2_BASE (0x40160000u) macro
73636 #define TMR2 ((TMR_Type *)TMR2_BASE)
73646 #define TMR_BASE_ADDRS { 0u, TMR1_BASE, TMR2_BASE, TMR3_BASE, TMR4_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm7.h78195 #define TMR2_BASE (0x40160000u) macro
78197 #define TMR2 ((TMR_Type *)TMR2_BASE)
78207 #define TMR_BASE_ADDRS { 0u, TMR1_BASE, TMR2_BASE, TMR3_BASE, TMR4_BASE }
DMIMXRT1166_cm4.h79097 #define TMR2_BASE (0x40160000u) macro
79099 #define TMR2 ((TMR_Type *)TMR2_BASE)
79109 #define TMR_BASE_ADDRS { 0u, TMR1_BASE, TMR2_BASE, TMR3_BASE, TMR4_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h78697 #define TMR2_BASE (0x40160000u) macro
78699 #define TMR2 ((TMR_Type *)TMR2_BASE)
78709 #define TMR_BASE_ADDRS { 0u, TMR1_BASE, TMR2_BASE, TMR3_BASE, TMR4_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h79596 #define TMR2_BASE (0x40160000u) macro
79598 #define TMR2 ((TMR_Type *)TMR2_BASE)
79608 #define TMR_BASE_ADDRS { 0u, TMR1_BASE, TMR2_BASE, TMR3_BASE, TMR4_BASE }
DMIMXRT1173_cm7.h78694 #define TMR2_BASE (0x40160000u) macro
78696 #define TMR2 ((TMR_Type *)TMR2_BASE)
78706 #define TMR_BASE_ADDRS { 0u, TMR1_BASE, TMR2_BASE, TMR3_BASE, TMR4_BASE }
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h89364 #define TMR2_BASE (0x40160000u) macro
89366 #define TMR2 ((TMR_Type *)TMR2_BASE)
89376 #define TMR_BASE_ADDRS { 0u, TMR1_BASE, TMR2_BASE, TMR3_BASE, TMR4_BASE }

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