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Searched refs:SWREG68 (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM4/
DMIMX8MM4_cm4.h73917 …__IO uint32_t SWREG68; /**< Register for contrast adjusting, offset: 0x1… member
78560 …__IO uint32_t SWREG68; /**< Base address MSB (bits 63:32) for reference … member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM3/
DMIMX8MM3_cm4.h73917 …__IO uint32_t SWREG68; /**< Register for contrast adjusting, offset: 0x1… member
78560 …__IO uint32_t SWREG68; /**< Base address MSB (bits 63:32) for reference … member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM2/
DMIMX8MM2_cm4.h73917 …__IO uint32_t SWREG68; /**< Register for contrast adjusting, offset: 0x1… member
78560 …__IO uint32_t SWREG68; /**< Base address MSB (bits 63:32) for reference … member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM5/
DMIMX8MM5_cm4.h73917 …__IO uint32_t SWREG68; /**< Register for contrast adjusting, offset: 0x1… member
78560 …__IO uint32_t SWREG68; /**< Base address MSB (bits 63:32) for reference … member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM6/
DMIMX8MM6_cm4.h73917 …__IO uint32_t SWREG68; /**< Register for contrast adjusting, offset: 0x1… member
78560 …__IO uint32_t SWREG68; /**< Base address MSB (bits 63:32) for reference … member
DMIMX8MM6_ca53.h73381 …__IO uint32_t SWREG68; /**< Register for contrast adjusting, offset: 0x1… member
78024 …__IO uint32_t SWREG68; /**< Base address MSB (bits 63:32) for reference … member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM1/
DMIMX8MM1_cm4.h73917 …__IO uint32_t SWREG68; /**< Register for contrast adjusting, offset: 0x1… member
78560 …__IO uint32_t SWREG68; /**< Base address MSB (bits 63:32) for reference … member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8ML8/
DMIMX8ML8_cm7.h103198 …__IO uint32_t SWREG68; /**< Register for contrast adjusting, offset: 0x1… member
107841 …__IO uint32_t SWREG68; /**< Base address MSB (bits 63:32) for reference … member
DMIMX8ML8_ca53.h103231 …__IO uint32_t SWREG68; /**< Register for contrast adjusting, offset: 0x1… member
107874 …__IO uint32_t SWREG68; /**< Base address MSB (bits 63:32) for reference … member
DMIMX8ML8_dsp.h98972 …__IO uint32_t SWREG68; /**< Register for contrast adjusting, offset: 0x1… member
103309 …__IO uint32_t SWREG68; /**< Base address MSB (bits 63:32) for reference … member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8ML6/
DMIMX8ML6_cm7.h103198 …__IO uint32_t SWREG68; /**< Register for contrast adjusting, offset: 0x1… member
107841 …__IO uint32_t SWREG68; /**< Base address MSB (bits 63:32) for reference … member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8ML4/
DMIMX8ML4_cm7.h103198 …__IO uint32_t SWREG68; /**< Register for contrast adjusting, offset: 0x1… member
107841 …__IO uint32_t SWREG68; /**< Base address MSB (bits 63:32) for reference … member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8ML3/
DMIMX8ML3_cm7.h103198 …__IO uint32_t SWREG68; /**< Register for contrast adjusting, offset: 0x1… member
107841 …__IO uint32_t SWREG68; /**< Base address MSB (bits 63:32) for reference … member