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Searched refs:SWREG1 (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8ML8/
DMIMX8ML8_cm7.h103168 __IO uint32_t SWREG1; /**< Interrupt register decoder, offset: 0x4 */ member
107774 __IO uint32_t SWREG1; /**< Interrupt register decoder, offset: 0x4 */ member
111316 __IO uint32_t SWREG1; /**< Interrupt register encoder, offset: 0x4 */ member
114952 __IO uint32_t SWREG1; /**< Interrupt register encoder, offset: 0x4 */ member
DMIMX8ML8_ca53.h103201 __IO uint32_t SWREG1; /**< Interrupt register decoder, offset: 0x4 */ member
107807 __IO uint32_t SWREG1; /**< Interrupt register decoder, offset: 0x4 */ member
111349 __IO uint32_t SWREG1; /**< Interrupt register encoder, offset: 0x4 */ member
114985 __IO uint32_t SWREG1; /**< Interrupt register encoder, offset: 0x4 */ member
DMIMX8ML8_dsp.h98942 __IO uint32_t SWREG1; /**< Interrupt register decoder, offset: 0x4 */ member
103242 __IO uint32_t SWREG1; /**< Interrupt register decoder, offset: 0x4 */ member
106484 __IO uint32_t SWREG1; /**< Interrupt register encoder, offset: 0x4 */ member
110120 __IO uint32_t SWREG1; /**< Interrupt register encoder, offset: 0x4 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8ML6/
DMIMX8ML6_cm7.h103168 __IO uint32_t SWREG1; /**< Interrupt register decoder, offset: 0x4 */ member
107774 __IO uint32_t SWREG1; /**< Interrupt register decoder, offset: 0x4 */ member
111316 __IO uint32_t SWREG1; /**< Interrupt register encoder, offset: 0x4 */ member
114952 __IO uint32_t SWREG1; /**< Interrupt register encoder, offset: 0x4 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8ML4/
DMIMX8ML4_cm7.h103168 __IO uint32_t SWREG1; /**< Interrupt register decoder, offset: 0x4 */ member
107774 __IO uint32_t SWREG1; /**< Interrupt register decoder, offset: 0x4 */ member
111316 __IO uint32_t SWREG1; /**< Interrupt register encoder, offset: 0x4 */ member
114952 __IO uint32_t SWREG1; /**< Interrupt register encoder, offset: 0x4 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8ML3/
DMIMX8ML3_cm7.h103168 __IO uint32_t SWREG1; /**< Interrupt register decoder, offset: 0x4 */ member
107774 __IO uint32_t SWREG1; /**< Interrupt register decoder, offset: 0x4 */ member
111316 __IO uint32_t SWREG1; /**< Interrupt register encoder, offset: 0x4 */ member
114952 __IO uint32_t SWREG1; /**< Interrupt register encoder, offset: 0x4 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM4/
DMIMX8MM4_cm4.h73887 __IO uint32_t SWREG1; /**< Interrupt register decoder, offset: 0x4 */ member
78493 __IO uint32_t SWREG1; /**< Interrupt register decoder, offset: 0x4 */ member
82035 __IO uint32_t SWREG1; /**< VPU H1 Register 1, offset: 0x4 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM3/
DMIMX8MM3_cm4.h73887 __IO uint32_t SWREG1; /**< Interrupt register decoder, offset: 0x4 */ member
78493 __IO uint32_t SWREG1; /**< Interrupt register decoder, offset: 0x4 */ member
82035 __IO uint32_t SWREG1; /**< VPU H1 Register 1, offset: 0x4 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM2/
DMIMX8MM2_cm4.h73887 __IO uint32_t SWREG1; /**< Interrupt register decoder, offset: 0x4 */ member
78493 __IO uint32_t SWREG1; /**< Interrupt register decoder, offset: 0x4 */ member
82035 __IO uint32_t SWREG1; /**< VPU H1 Register 1, offset: 0x4 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM5/
DMIMX8MM5_cm4.h73887 __IO uint32_t SWREG1; /**< Interrupt register decoder, offset: 0x4 */ member
78493 __IO uint32_t SWREG1; /**< Interrupt register decoder, offset: 0x4 */ member
82035 __IO uint32_t SWREG1; /**< VPU H1 Register 1, offset: 0x4 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM6/
DMIMX8MM6_cm4.h73887 __IO uint32_t SWREG1; /**< Interrupt register decoder, offset: 0x4 */ member
78493 __IO uint32_t SWREG1; /**< Interrupt register decoder, offset: 0x4 */ member
82035 __IO uint32_t SWREG1; /**< VPU H1 Register 1, offset: 0x4 */ member
DMIMX8MM6_ca53.h73351 __IO uint32_t SWREG1; /**< Interrupt register decoder, offset: 0x4 */ member
77957 __IO uint32_t SWREG1; /**< Interrupt register decoder, offset: 0x4 */ member
81499 __IO uint32_t SWREG1; /**< VPU H1 Register 1, offset: 0x4 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM1/
DMIMX8MM1_cm4.h73887 __IO uint32_t SWREG1; /**< Interrupt register decoder, offset: 0x4 */ member
78493 __IO uint32_t SWREG1; /**< Interrupt register decoder, offset: 0x4 */ member
82035 __IO uint32_t SWREG1; /**< VPU H1 Register 1, offset: 0x4 */ member