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Searched refs:PR (Results 1 – 25 of 140) sorted by relevance

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/hal_nxp-3.7.0/imx/drivers/
Dgpt.h175 base->PR = (base->PR & ~GPT_PR_PRESCALER_MASK) | GPT_PR_PRESCALER(prescaler); in GPT_SetPrescaler()
186 return (base->PR & GPT_PR_PRESCALER_MASK) >> GPT_PR_PRESCALER_SHIFT; in GPT_GetPrescaler()
199 base->PR = (base->PR & ~GPT_PR_PRESCALER24M_MASK) | GPT_PR_PRESCALER24M(prescaler); in GPT_SetOscPrescaler()
210 return (base->PR & GPT_PR_PRESCALER24M_MASK) >> GPT_PR_PRESCALER24M_SHIFT; in GPT_GetOscPrescaler()
/hal_nxp-3.7.0/mcux/mcux-sdk/drivers/gpt/
Dfsl_gpt.h221 base->PR = (base->PR & ~GPT_PR_PRESCALER_MASK) | GPT_PR_PRESCALER(divider - 1U); in GPT_SetClockDivider()
232 return ((base->PR & GPT_PR_PRESCALER_MASK) >> GPT_PR_PRESCALER_SHIFT) + 1U; in GPT_GetClockDivider()
245 base->PR = (base->PR & ~GPT_PR_PRESCALER24M_MASK) | GPT_PR_PRESCALER24M(divider - 1U); in GPT_SetOscClockDivider()
256 return ((base->PR & GPT_PR_PRESCALER24M_MASK) >> GPT_PR_PRESCALER24M_SHIFT) + 1U; in GPT_GetOscClockDivider()
/hal_nxp-3.7.0/mcux/mcux-sdk/drivers/ctimer/
Dfsl_ctimer.c119 base->PR = CTIMER_PR_PRVAL(config->prescale); in CTIMER_Init()
202 uint32_t timerClock = srcClock_Hz / (base->PR + 1U); in CTIMER_SetupPwm()
Dfsl_ctimer.h537 base->PR = CTIMER_PR_PRVAL(prescale); in CTIMER_SetPrescale()
/hal_nxp-3.7.0/mcux/mcux-sdk/
DCONTRIBUTING.md102 …ign-off is detected, the check will fails, you could check details and update your PR accordingly.|
178 …sted but it's OK** to amend your previous commit and use force push to update your PR conveniently.
/hal_nxp-3.7.0/mcux/
DREADME71 …2. Patched middleware_usb_common_header.cmake file to address build issue. PR submitted to upstream
/hal_nxp-3.7.0/mcux/mcux-sdk/drivers/smartcard/
Dfsl_smartcard_usim.c369 CTIMER0->PR = 0U; in SMARTCARD_USIM_TimerInit()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC802/
DLPC802.h1172 …__IO uint32_t PR; /**< Prescale Register. When the Prescale Counter… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC804/
DLPC804.h1554 …__IO uint32_t PR; /**< Prescale Register. When the Prescale Counter… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC844/
DLPC844.h1252 …__IO uint32_t PR; /**< Prescale Register. When the Prescale Counter… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC845/
DLPC845.h1658 …__IO uint32_t PR; /**< Prescale Register. When the Prescale Counter… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC51U68/
DLPC51U68.h1285 …__IO uint32_t PR; /**< Prescale Register. When the Prescale Counter… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC54113/
DLPC54113.h1253 …__IO uint32_t PR; /**< Prescale Register. When the Prescale Counter… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC54114/
DLPC54114_cm4.h1252 …__IO uint32_t PR; /**< Prescale Register. When the Prescale Counter… member
DLPC54114_cm0plus.h1241 …__IO uint32_t PR; /**< Prescale Register. When the Prescale Counter… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC54S005/
DLPC54S005.h1863 __IO uint32_t PR; /**< Prescale Register, offset: 0xC */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC54605/
DLPC54605.h1459 __IO uint32_t PR; /**< Prescale Register, offset: 0xC */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC54607/
DLPC54607.h1456 __IO uint32_t PR; /**< Prescale Register, offset: 0xC */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC54005/
DLPC54005.h1455 __IO uint32_t PR; /**< Prescale Register, offset: 0xC */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC54616/
DLPC54616.h3000 __IO uint32_t PR; /**< Prescale Register, offset: 0xC */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC54606/
DLPC54606.h2925 __IO uint32_t PR; /**< Prescale Register, offset: 0xC */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC54016/
DLPC54016.h2730 __IO uint32_t PR; /**< Prescale Register, offset: 0xC */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5504/
DLPC5504.h6345 __IO uint32_t PR; /**< Prescale Register, offset: 0xC */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC54S018M/
DLPC54S018M.h3406 __IO uint32_t PR; /**< Prescale Register, offset: 0xC */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5502CPXXXX/
DLPC5502CPXXXX.h6300 __IO uint32_t PR; /**< Prescale Register, offset: 0xC */ member

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