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Searched refs:PLLDIG_PLLFD_MFN_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-3.7.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Specific.c266 …IP_CORE_PLL->PLLFD &= ~(PLLDIG_PLLFD_MFN_MASK | PLLDIG_PLLFD_SDMEN_MASK); /* Disable modulati… in Clock_Ip_SpecificPlatformInitClock()
277 …IP_PERIPH_PLL->PLLFD &= ~(PLLDIG_PLLFD_MFN_MASK | PLLDIG_PLLFD_SDMEN_MASK); /* Disable modula… in Clock_Ip_SpecificPlatformInitClock()
310 …IP_CORE_PLL->PLLFD &= ~(PLLDIG_PLLFD_MFN_MASK | PLLDIG_PLLFD_SDMEN_MASK); /* Disable modulati… in Clock_Ip_SpecificPlatformInitClock()
333 …IP_PERIPH_PLL->PLLFD &= ~(PLLDIG_PLLFD_MFN_MASK | PLLDIG_PLLFD_SDMEN_MASK); /* Disable modula… in Clock_Ip_SpecificPlatformInitClock()
DClock_Ip_Pll.c227 Value &= ~(PLLDIG_PLLFD_MFN_MASK | PLLDIG_PLLFD_SDMEN_MASK); in Clock_Ip_SetPlldigRdivMfiMfnSdmenSsscgbypSpreadctlStepnoStepsize()
371 Value &= ~(PLLDIG_PLLFD_MFN_MASK | PLLDIG_PLLFD_SDMEN_MASK); in Clock_Ip_SetPlldigRdivMfiMfnSdmen()
DClock_Ip_Frequency.c4094 … Mfn = ((Base->PLLFD & PLLDIG_PLLFD_MFN_MASK) >> PLLDIG_PLLFD_MFN_SHIFT); /* Mfn */ in PLL_VCO()
/hal_nxp-3.7.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_PLLDIG.h181 #define PLLDIG_PLLFD_MFN_MASK (0x7FFFU) macro
184 … (((uint32_t)(((uint32_t)(x)) << PLLDIG_PLLFD_MFN_SHIFT)) & PLLDIG_PLLFD_MFN_MASK)