/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1171/gcc/ |
D | MIMXRT1171xxxxx_flexspi_nor_sdram.ld | 40 m_flash_config (RX) : ORIGIN = 0x30000400, LENGTH = 0x00000C00 41 m_ivt (RX) : ORIGIN = 0x30001000, LENGTH = 0x00000020 42 m_boot_data (RX) : ORIGIN = 0x30001020, LENGTH = 0x00000010 43 m_dcd_data (RX) : ORIGIN = 0x30001030, LENGTH = 0x000006E8 44 m_xmcd_data (RX) : ORIGIN = 0x30001040, LENGTH = 0x00000204 45 m_interrupts (RX) : ORIGIN = 0x30002000, LENGTH = 0x00000400 46 m_text (RX) : ORIGIN = 0x30002400, LENGTH = TEXT_SIZE 47 m_qacode (RX) : ORIGIN = 0x00000000, LENGTH = 0x00040000 48 …m_data (RW) : ORIGIN = 0x80000000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x030… 49 m_data2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x00040000 [all …]
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1175/gcc/ |
D | MIMXRT1175xxxxx_cm7_flexspi_nor_sdram.ld | 40 m_flash_config (RX) : ORIGIN = 0x30000400, LENGTH = 0x00000C00 41 m_ivt (RX) : ORIGIN = 0x30001000, LENGTH = 0x00000020 42 m_boot_data (RX) : ORIGIN = 0x30001020, LENGTH = 0x00000010 43 m_dcd_data (RX) : ORIGIN = 0x30001030, LENGTH = 0x000006E8 44 m_xmcd_data (RX) : ORIGIN = 0x30001040, LENGTH = 0x00000204 45 m_interrupts (RX) : ORIGIN = 0x30002000, LENGTH = 0x00000400 46 m_text (RX) : ORIGIN = 0x30002400, LENGTH = TEXT_SIZE 47 m_qacode (RX) : ORIGIN = 0x00000000, LENGTH = 0x00040000 48 …m_data (RW) : ORIGIN = 0x80000000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x030… 49 m_data2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x00040000 [all …]
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D | MIMXRT1175xxxxx_cm4_flexspi_nor_sdram.ld | 40 m_flash_config (RX) : ORIGIN = 0x08000400, LENGTH = 0x00000C00 41 m_ivt (RX) : ORIGIN = 0x08001000, LENGTH = 0x00000020 42 m_boot_data (RX) : ORIGIN = 0x08001020, LENGTH = 0x00000010 43 m_dcd_data (RX) : ORIGIN = 0x08001030, LENGTH = 0x000006E8 44 m_xmcd_data (RX) : ORIGIN = 0x08001040, LENGTH = 0x00000204 45 m_interrupts (RX) : ORIGIN = 0x08002000, LENGTH = 0x00000400 46 m_text (RX) : ORIGIN = 0x08002400, LENGTH = TEXT_SIZE 47 m_qacode (RX) : ORIGIN = 0x1FFE0000, LENGTH = 0x00020000 48 …m_data (RW) : ORIGIN = 0x80000000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x030… 49 m_data2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000 [all …]
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D | MIMXRT1175xxxxx_cm4_flexspi_nor.ld | 40 m_flash_config (RX) : ORIGIN = 0x08000400, LENGTH = 0x00000C00 41 m_ivt (RX) : ORIGIN = 0x08001000, LENGTH = 0x00001000 42 m_interrupts (RX) : ORIGIN = 0x08002000, LENGTH = 0x00000400 43 m_text (RX) : ORIGIN = 0x08002400, LENGTH = TEXT_SIZE 44 m_qacode (RX) : ORIGIN = 0x1FFE0000, LENGTH = 0x00020000 45 …m_data (RW) : ORIGIN = 0x20000000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x000… 46 m_data2 (RW) : ORIGIN = 0x20240000, LENGTH = 0x00040000 47 …m_ncache (RW) : ORIGIN = 0x20280000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x000… 48 m_heap (RW) : ORIGIN = NCACHE_HEAP_START, LENGTH = HEAP_SIZE 55 __NCACHE_REGION_SIZE = LENGTH(m_ncache) + NCACHE_HEAP_SIZE; [all …]
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1166/gcc/ |
D | MIMXRT1166xxxxx_cm7_flexspi_nor_sdram.ld | 40 m_flash_config (RX) : ORIGIN = 0x30000400, LENGTH = 0x00000C00 41 m_ivt (RX) : ORIGIN = 0x30001000, LENGTH = 0x00000020 42 m_boot_data (RX) : ORIGIN = 0x30001020, LENGTH = 0x00000010 43 m_dcd_data (RX) : ORIGIN = 0x30001030, LENGTH = 0x000006E8 44 m_xmcd_data (RX) : ORIGIN = 0x30001040, LENGTH = 0x00000204 45 m_interrupts (RX) : ORIGIN = 0x30002000, LENGTH = 0x00000400 46 m_text (RX) : ORIGIN = 0x30002400, LENGTH = TEXT_SIZE 47 m_qacode (RX) : ORIGIN = 0x00000000, LENGTH = 0x00040000 48 …m_data (RW) : ORIGIN = 0x80000000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x030… 49 m_data2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x00040000 [all …]
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D | MIMXRT1166xxxxx_cm4_flexspi_nor_sdram.ld | 40 m_flash_config (RX) : ORIGIN = 0x08000400, LENGTH = 0x00000C00 41 m_ivt (RX) : ORIGIN = 0x08001000, LENGTH = 0x00000020 42 m_boot_data (RX) : ORIGIN = 0x08001020, LENGTH = 0x00000010 43 m_dcd_data (RX) : ORIGIN = 0x08001030, LENGTH = 0x000006E8 44 m_xmcd_data (RX) : ORIGIN = 0x08001040, LENGTH = 0x00000204 45 m_interrupts (RX) : ORIGIN = 0x08002000, LENGTH = 0x00000400 46 m_text (RX) : ORIGIN = 0x08002400, LENGTH = TEXT_SIZE 47 m_qacode (RX) : ORIGIN = 0x1FFE0000, LENGTH = 0x00020000 48 …m_data (RW) : ORIGIN = 0x80000000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x030… 49 m_data2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000 [all …]
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D | MIMXRT1166xxxxx_cm4_flexspi_nor.ld | 40 m_flash_config (RX) : ORIGIN = 0x08000400, LENGTH = 0x00000C00 41 m_ivt (RX) : ORIGIN = 0x08001000, LENGTH = 0x00001000 42 m_interrupts (RX) : ORIGIN = 0x08002000, LENGTH = 0x00000400 43 m_text (RX) : ORIGIN = 0x08002400, LENGTH = TEXT_SIZE 44 m_qacode (RX) : ORIGIN = 0x1FFE0000, LENGTH = 0x00020000 45 …m_data (RW) : ORIGIN = 0x20000000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x000… 46 m_data2 (RW) : ORIGIN = 0x20240000, LENGTH = 0x00008000 47 …m_ncache (RW) : ORIGIN = 0x20248000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x000… 48 m_heap (RW) : ORIGIN = NCACHE_HEAP_START, LENGTH = HEAP_SIZE 55 __NCACHE_REGION_SIZE = LENGTH(m_ncache) + NCACHE_HEAP_SIZE; [all …]
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1165/gcc/ |
D | MIMXRT1165xxxxx_cm7_flexspi_nor_sdram.ld | 40 m_flash_config (RX) : ORIGIN = 0x30000400, LENGTH = 0x00000C00 41 m_ivt (RX) : ORIGIN = 0x30001000, LENGTH = 0x00000020 42 m_boot_data (RX) : ORIGIN = 0x30001020, LENGTH = 0x00000010 43 m_dcd_data (RX) : ORIGIN = 0x30001030, LENGTH = 0x000006E8 44 m_xmcd_data (RX) : ORIGIN = 0x30001040, LENGTH = 0x00000204 45 m_interrupts (RX) : ORIGIN = 0x30002000, LENGTH = 0x00000400 46 m_text (RX) : ORIGIN = 0x30002400, LENGTH = TEXT_SIZE 47 m_qacode (RX) : ORIGIN = 0x00000000, LENGTH = 0x00040000 48 …m_data (RW) : ORIGIN = 0x80000000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x030… 49 m_data2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x00040000 [all …]
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D | MIMXRT1165xxxxx_cm4_flexspi_nor_sdram.ld | 40 m_flash_config (RX) : ORIGIN = 0x08000400, LENGTH = 0x00000C00 41 m_ivt (RX) : ORIGIN = 0x08001000, LENGTH = 0x00000020 42 m_boot_data (RX) : ORIGIN = 0x08001020, LENGTH = 0x00000010 43 m_dcd_data (RX) : ORIGIN = 0x08001030, LENGTH = 0x000006E8 44 m_xmcd_data (RX) : ORIGIN = 0x08001040, LENGTH = 0x00000204 45 m_interrupts (RX) : ORIGIN = 0x08002000, LENGTH = 0x00000400 46 m_text (RX) : ORIGIN = 0x08002400, LENGTH = TEXT_SIZE 47 m_qacode (RX) : ORIGIN = 0x1FFE0000, LENGTH = 0x00020000 48 …m_data (RW) : ORIGIN = 0x80000000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x030… 49 m_data2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000 [all …]
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1173/gcc/ |
D | MIMXRT1173xxxxx_cm4_flexspi_nor_sdram.ld | 37 m_flash_config (RX) : ORIGIN = 0x08000400, LENGTH = 0x00000C00 38 m_ivt (RX) : ORIGIN = 0x08001000, LENGTH = 0x00000020 39 m_boot_data (RX) : ORIGIN = 0x08001020, LENGTH = 0x00000010 40 m_dcd_data (RX) : ORIGIN = 0x08001030, LENGTH = 0x000006E8 41 m_xmcd_data (RX) : ORIGIN = 0x08001040, LENGTH = 0x00000204 42 m_interrupts (RX) : ORIGIN = 0x08002000, LENGTH = 0x00000400 43 m_text (RX) : ORIGIN = 0x08002400, LENGTH = TEXT_SIZE 44 m_qacode (RX) : ORIGIN = 0x1FFE0000, LENGTH = 0x00020000 45 …m_data (RW) : ORIGIN = 0x80000000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x030… 46 m_data2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000 [all …]
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D | MIMXRT1173xxxxx_cm7_flexspi_nor_sdram.ld | 37 m_flash_config (RX) : ORIGIN = 0x30000400, LENGTH = 0x00000C00 38 m_ivt (RX) : ORIGIN = 0x30001000, LENGTH = 0x00000020 39 m_boot_data (RX) : ORIGIN = 0x30001020, LENGTH = 0x00000010 40 m_dcd_data (RX) : ORIGIN = 0x30001030, LENGTH = 0x000006E8 41 m_xmcd_data (RX) : ORIGIN = 0x30001040, LENGTH = 0x00000204 42 m_interrupts (RX) : ORIGIN = 0x30002000, LENGTH = 0x00000400 43 m_text (RX) : ORIGIN = 0x30002400, LENGTH = TEXT_SIZE 44 m_qacode (RX) : ORIGIN = 0x00000000, LENGTH = 0x00040000 45 …m_data (RW) : ORIGIN = 0x80000000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x030… 46 m_data2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x00040000 [all …]
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D | MIMXRT1173xxxxx_cm4_flexspi_nor.ld | 37 m_flash_config (RX) : ORIGIN = 0x08000400, LENGTH = 0x00000C00 38 m_ivt (RX) : ORIGIN = 0x08001000, LENGTH = 0x00001000 39 m_interrupts (RX) : ORIGIN = 0x08002000, LENGTH = 0x00000400 40 m_text (RX) : ORIGIN = 0x08002400, LENGTH = TEXT_SIZE 41 m_qacode (RX) : ORIGIN = 0x1FFE0000, LENGTH = 0x00020000 42 …m_data (RW) : ORIGIN = 0x20000000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x000… 43 m_data2 (RW) : ORIGIN = 0x20240000, LENGTH = 0x00040000 44 …m_ncache (RW) : ORIGIN = 0x20280000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x000… 45 m_heap (RW) : ORIGIN = NCACHE_HEAP_START, LENGTH = HEAP_SIZE 52 __NCACHE_REGION_SIZE = LENGTH(m_ncache) + NCACHE_HEAP_SIZE; [all …]
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1176/gcc/ |
D | MIMXRT1176xxxxx_cm4_flexspi_nor_sdram.ld | 40 m_flash_config (RX) : ORIGIN = 0x08000400, LENGTH = 0x00000C00 41 m_ivt (RX) : ORIGIN = 0x08001000, LENGTH = 0x00000020 42 m_boot_data (RX) : ORIGIN = 0x08001020, LENGTH = 0x00000010 43 m_dcd_data (RX) : ORIGIN = 0x08001030, LENGTH = 0x000006E8 44 m_xmcd_data (RX) : ORIGIN = 0x08001040, LENGTH = 0x00000204 45 m_interrupts (RX) : ORIGIN = 0x08002000, LENGTH = 0x00000400 46 m_text (RX) : ORIGIN = 0x08002400, LENGTH = TEXT_SIZE 47 m_qacode (RX) : ORIGIN = 0x1FFE0000, LENGTH = 0x00020000 48 …m_data (RW) : ORIGIN = 0x80000000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x030… 49 m_data2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000 [all …]
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D | MIMXRT1176xxxxx_cm7_flexspi_nor_sdram.ld | 40 m_flash_config (RX) : ORIGIN = 0x30000400, LENGTH = 0x00000C00 41 m_ivt (RX) : ORIGIN = 0x30001000, LENGTH = 0x00000020 42 m_boot_data (RX) : ORIGIN = 0x30001020, LENGTH = 0x00000010 43 m_dcd_data (RX) : ORIGIN = 0x30001030, LENGTH = 0x000006E8 44 m_xmcd_data (RX) : ORIGIN = 0x30001040, LENGTH = 0x00000204 45 m_interrupts (RX) : ORIGIN = 0x30002000, LENGTH = 0x00000400 46 m_text (RX) : ORIGIN = 0x30002400, LENGTH = TEXT_SIZE 47 m_qacode (RX) : ORIGIN = 0x00000000, LENGTH = 0x00040000 48 …m_data (RW) : ORIGIN = 0x80000000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x030… 49 m_data2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x00040000 [all …]
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D | MIMXRT1176xxxxx_cm4_flexspi_nor.ld | 40 m_flash_config (RX) : ORIGIN = 0x08000400, LENGTH = 0x00000C00 41 m_ivt (RX) : ORIGIN = 0x08001000, LENGTH = 0x00001000 42 m_interrupts (RX) : ORIGIN = 0x08002000, LENGTH = 0x00000400 43 m_text (RX) : ORIGIN = 0x08002400, LENGTH = TEXT_SIZE 44 m_qacode (RX) : ORIGIN = 0x1FFE0000, LENGTH = 0x00020000 45 …m_data (RW) : ORIGIN = 0x20000000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x000… 46 m_data2 (RW) : ORIGIN = 0x20240000, LENGTH = 0x00040000 47 …m_ncache (RW) : ORIGIN = 0x20280000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x000… 48 m_heap (RW) : ORIGIN = NCACHE_HEAP_START, LENGTH = HEAP_SIZE 55 __NCACHE_REGION_SIZE = LENGTH(m_ncache) + NCACHE_HEAP_SIZE; [all …]
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1172/gcc/ |
D | MIMXRT1172xxxxx_flexspi_nor_sdram.ld | 40 m_flash_config (RX) : ORIGIN = 0x30000400, LENGTH = 0x00000C00 41 m_ivt (RX) : ORIGIN = 0x30001000, LENGTH = 0x00000020 42 m_boot_data (RX) : ORIGIN = 0x30001020, LENGTH = 0x00000010 43 m_dcd_data (RX) : ORIGIN = 0x30001030, LENGTH = 0x000006E8 44 m_xmcd_data (RX) : ORIGIN = 0x30001040, LENGTH = 0x00000204 45 m_interrupts (RX) : ORIGIN = 0x30002000, LENGTH = 0x00000400 46 m_text (RX) : ORIGIN = 0x30002400, LENGTH = TEXT_SIZE 47 m_qacode (RX) : ORIGIN = 0x00000000, LENGTH = 0x00040000 48 …m_data (RW) : ORIGIN = 0x80000000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x030… 49 m_data2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x00040000 [all …]
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1061/gcc/ |
D | MIMXRT1061xxxxx_flexspi_nor_sdram.ld | 44 m_flash_config (RX) : ORIGIN = 0x60000000, LENGTH = 0x00001000 45 m_ivt (RX) : ORIGIN = 0x60001000, LENGTH = 0x00001000 46 m_interrupts (RX) : ORIGIN = 0x60002000, LENGTH = 0x00000400 47 m_text (RX) : ORIGIN = 0x60002400, LENGTH = TEXT_SIZE 48 m_qacode (RX) : ORIGIN = 0x00000000, LENGTH = 0x00020000 49 …m_data (RW) : ORIGIN = 0x80000000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x01E… 50 …m_ncache (RW) : ORIGIN = 0x81E00000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x002… 51 m_data2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000 52 m_data3 (RW) : ORIGIN = 0x20200000, LENGTH = 0x000C0000 53 m_heap (RW) : ORIGIN = NCACHE_HEAP_START, LENGTH = HEAP_SIZE [all …]
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1062/gcc/ |
D | MIMXRT1062xxxxx_flexspi_nor_sdram.ld | 45 m_flash_config (RX) : ORIGIN = 0x60000000, LENGTH = 0x00001000 46 m_ivt (RX) : ORIGIN = 0x60001000, LENGTH = 0x00001000 47 m_interrupts (RX) : ORIGIN = 0x60002000, LENGTH = 0x00000400 48 m_text (RX) : ORIGIN = 0x60002400, LENGTH = TEXT_SIZE 49 m_qacode (RX) : ORIGIN = 0x00000000, LENGTH = 0x00020000 50 …m_data (RW) : ORIGIN = 0x80000000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x01E… 51 …m_ncache (RW) : ORIGIN = 0x81E00000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x002… 52 m_data2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000 53 m_data3 (RW) : ORIGIN = 0x20200000, LENGTH = 0x000C0000 54 m_heap (RW) : ORIGIN = NCACHE_HEAP_START, LENGTH = HEAP_SIZE [all …]
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1052/gcc/ |
D | MIMXRT1052xxxxx_flexspi_nor_sdram.ld | 40 m_flash_config (RX) : ORIGIN = 0x60000000, LENGTH = 0x00001000 41 m_ivt (RX) : ORIGIN = 0x60001000, LENGTH = 0x00001000 42 m_interrupts (RX) : ORIGIN = 0x60002000, LENGTH = 0x00000400 43 m_text (RX) : ORIGIN = 0x60002400, LENGTH = 0x03FFDC00 44 m_qacode (RX) : ORIGIN = 0x00000000, LENGTH = 0x00020000 45 …m_data (RW) : ORIGIN = 0x80000000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x01E… 46 …m_ncache (RW) : ORIGIN = 0x81E00000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x002… 47 m_data2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000 48 m_data3 (RW) : ORIGIN = 0x20200000, LENGTH = 0x00040000 49 m_heap (RW) : ORIGIN = NCACHE_HEAP_START, LENGTH = HEAP_SIZE [all …]
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1041/gcc/ |
D | MIMXRT1041xxxxx_flexspi_nor_sdram.ld | 38 m_flash_config (RX) : ORIGIN = 0x60000000, LENGTH = 0x00001000 39 m_ivt (RX) : ORIGIN = 0x60001000, LENGTH = 0x00001000 40 m_interrupts (RX) : ORIGIN = 0x60002000, LENGTH = 0x00000400 41 m_text (RX) : ORIGIN = 0x60002400, LENGTH = 0x007FDC00 42 m_qacode (RX) : ORIGIN = 0x00000000, LENGTH = 0x00020000 43 …m_data (RW) : ORIGIN = 0x80000000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x01E… 44 …m_ncache (RW) : ORIGIN = 0x81E00000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x002… 45 m_data2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000 46 m_data3 (RW) : ORIGIN = 0x20200000, LENGTH = 0x00040000 47 m_heap (RW) : ORIGIN = NCACHE_HEAP_START, LENGTH = HEAP_SIZE [all …]
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1021/gcc/ |
D | MIMXRT1021xxxxx_flexspi_nor_sdram.ld | 42 m_flash_config (RX) : ORIGIN = 0x60000000, LENGTH = 0x00001000 43 m_ivt (RX) : ORIGIN = 0x60001000, LENGTH = 0x00001000 44 m_interrupts (RX) : ORIGIN = 0x60002000, LENGTH = 0x00000400 45 m_text (RX) : ORIGIN = 0x60002400, LENGTH = 0x007FDC00 46 m_qacode (RX) : ORIGIN = 0x00000000, LENGTH = 0x00010000 47 …m_data (RW) : ORIGIN = 0x80000000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x01E… 48 …m_ncache (RW) : ORIGIN = 0x81E00000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x002… 49 m_data2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x00010000 50 m_data3 (RW) : ORIGIN = 0x20200000, LENGTH = 0x00020000 51 m_heap (RW) : ORIGIN = NCACHE_HEAP_START, LENGTH = HEAP_SIZE [all …]
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1064/gcc/ |
D | MIMXRT1064xxxxx_flexspi_nor_sdram.ld | 42 m_flash_config (RX) : ORIGIN = 0x70000000, LENGTH = 0x00001000 43 m_ivt (RX) : ORIGIN = 0x70001000, LENGTH = 0x00001000 44 m_interrupts (RX) : ORIGIN = 0x70002000, LENGTH = 0x00000400 45 m_text (RX) : ORIGIN = 0x70002400, LENGTH = 0x003FDC00 46 m_qacode (RX) : ORIGIN = 0x00000000, LENGTH = 0x00020000 47 …m_data (RW) : ORIGIN = 0x80000000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x01E… 48 …m_ncache (RW) : ORIGIN = 0x81E00000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x002… 49 m_data2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000 50 m_data3 (RW) : ORIGIN = 0x20200000, LENGTH = 0x000C0000 51 m_heap (RW) : ORIGIN = NCACHE_HEAP_START, LENGTH = HEAP_SIZE [all …]
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1024/gcc/ |
D | MIMXRT1024xxxxx_flexspi_nor_sdram.ld | 40 m_flash_config (RX) : ORIGIN = 0x60000000, LENGTH = 0x00001000 41 m_ivt (RX) : ORIGIN = 0x60001000, LENGTH = 0x00001000 42 m_interrupts (RX) : ORIGIN = 0x60002000, LENGTH = 0x00000400 43 m_text (RX) : ORIGIN = 0x60002400, LENGTH = 0x003FDC00 44 m_qacode (RX) : ORIGIN = 0x00000000, LENGTH = 0x00010000 45 …m_data (RW) : ORIGIN = 0x80000000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x01E… 46 …m_ncache (RW) : ORIGIN = 0x81E00000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x002… 47 m_data2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x00010000 48 m_data3 (RW) : ORIGIN = 0x20200000, LENGTH = 0x00020000 49 m_heap (RW) : ORIGIN = NCACHE_HEAP_START, LENGTH = HEAP_SIZE [all …]
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1042/gcc/ |
D | MIMXRT1042xxxxx_flexspi_nor_sdram.ld | 38 m_flash_config (RX) : ORIGIN = 0x60000000, LENGTH = 0x00001000 39 m_ivt (RX) : ORIGIN = 0x60001000, LENGTH = 0x00001000 40 m_interrupts (RX) : ORIGIN = 0x60002000, LENGTH = 0x00000400 41 m_text (RX) : ORIGIN = 0x60002400, LENGTH = 0x007FDC00 42 m_qacode (RX) : ORIGIN = 0x00000000, LENGTH = 0x00020000 43 …m_data (RW) : ORIGIN = 0x80000000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x01E… 44 …m_ncache (RW) : ORIGIN = 0x81E00000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x002… 45 m_data2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000 46 m_data3 (RW) : ORIGIN = 0x20200000, LENGTH = 0x00040000 47 m_heap (RW) : ORIGIN = NCACHE_HEAP_START, LENGTH = HEAP_SIZE [all …]
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1051/gcc/ |
D | MIMXRT1051xxxxx_flexspi_nor_sdram.ld | 40 m_flash_config (RX) : ORIGIN = 0x60000000, LENGTH = 0x00001000 41 m_ivt (RX) : ORIGIN = 0x60001000, LENGTH = 0x00001000 42 m_interrupts (RX) : ORIGIN = 0x60002000, LENGTH = 0x00000400 43 m_text (RX) : ORIGIN = 0x60002400, LENGTH = 0x03FFDC00 44 m_qacode (RX) : ORIGIN = 0x00000000, LENGTH = 0x00020000 45 …m_data (RW) : ORIGIN = 0x80000000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x01E… 46 …m_ncache (RW) : ORIGIN = 0x81E00000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x002… 47 m_data2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000 48 m_data3 (RW) : ORIGIN = 0x20200000, LENGTH = 0x00040000 49 m_heap (RW) : ORIGIN = NCACHE_HEAP_START, LENGTH = HEAP_SIZE [all …]
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