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Searched refs:FSL_FEATURE_L1ICACHE_LINESIZE_BYTE (Results 1 – 25 of 104) sorted by relevance

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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8ML6/drivers/
Dfsl_cache.c499 uint32_t addr = address & ~((uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateICacheByRange()
507 addr += (uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
508 size -= (int32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1171/drivers/cm7/
Dfsl_cache.c499 uint32_t addr = address & ~((uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateICacheByRange()
507 addr += (uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
508 size -= (int32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8ML4/drivers/
Dfsl_cache.c499 uint32_t addr = address & ~((uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateICacheByRange()
507 addr += (uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
508 size -= (int32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1166/drivers/cm7/
Dfsl_cache.c499 uint32_t addr = address & ~((uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateICacheByRange()
507 addr += (uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
508 size -= (int32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1172/drivers/cm7/
Dfsl_cache.c499 uint32_t addr = address & ~((uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateICacheByRange()
507 addr += (uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
508 size -= (int32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8ML3/drivers/
Dfsl_cache.c499 uint32_t addr = address & ~((uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateICacheByRange()
507 addr += (uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
508 size -= (int32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1175/drivers/cm7/
Dfsl_cache.c499 uint32_t addr = address & ~((uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateICacheByRange()
507 addr += (uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
508 size -= (int32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1173/drivers/cm7/
Dfsl_cache.c499 uint32_t addr = address & ~((uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateICacheByRange()
507 addr += (uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
508 size -= (int32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1176/drivers/cm7/
Dfsl_cache.c499 uint32_t addr = address & ~((uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateICacheByRange()
507 addr += (uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
508 size -= (int32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
/hal_nxp-3.7.0/mcux/mcux-sdk/drivers/cache/armv7-m7/
Dfsl_cache.c499 uint32_t addr = address & ~((uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateICacheByRange()
507 addr += (uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
508 size -= (int32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1165/drivers/cm7/
Dfsl_cache.c499 uint32_t addr = address & ~((uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE - 1U); in L1CACHE_InvalidateICacheByRange()
507 addr += (uint32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
508 size -= (int32_t)FSL_FEATURE_L1ICACHE_LINESIZE_BYTE; in L1CACHE_InvalidateICacheByRange()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1166/drivers/cm4/
Dfsl_cache.h30 FSL_FEATURE_L1ICACHE_LINESIZE_BYTE /*!< The code bus CACHE line size is 16B = 128b. */
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1175/drivers/cm4/
Dfsl_cache.h30 FSL_FEATURE_L1ICACHE_LINESIZE_BYTE /*!< The code bus CACHE line size is 16B = 128b. */
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1176/drivers/cm4/
Dfsl_cache.h30 FSL_FEATURE_L1ICACHE_LINESIZE_BYTE /*!< The code bus CACHE line size is 16B = 128b. */
/hal_nxp-3.7.0/mcux/mcux-sdk/drivers/cache/lmem/
Dfsl_cache.h30 FSL_FEATURE_L1ICACHE_LINESIZE_BYTE /*!< The code bus CACHE line size is 16B = 128b. */
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1165/drivers/cm4/
Dfsl_cache.h30 FSL_FEATURE_L1ICACHE_LINESIZE_BYTE /*!< The code bus CACHE line size is 16B = 128b. */
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1173/drivers/cm4/
Dfsl_cache.h30 FSL_FEATURE_L1ICACHE_LINESIZE_BYTE /*!< The code bus CACHE line size is 16B = 128b. */
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM4/
DMIMX8MM4_cm4_features.h224 #define FSL_FEATURE_L1ICACHE_LINESIZE_BYTE (16) macro
/hal_nxp-3.7.0/s32/mcux/devices/S32K146/
DS32K146_features.h176 #define FSL_FEATURE_L1ICACHE_LINESIZE_BYTE (16) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM5/
DMIMX8MM5_cm4_features.h224 #define FSL_FEATURE_L1ICACHE_LINESIZE_BYTE (16) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM6/
DMIMX8MM6_cm4_features.h224 #define FSL_FEATURE_L1ICACHE_LINESIZE_BYTE (16) macro
DMIMX8MM6_ca53_features.h212 #define FSL_FEATURE_L1ICACHE_LINESIZE_BYTE (64) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN6/
DMIMX8MN6_ca53_features.h212 #define FSL_FEATURE_L1ICACHE_LINESIZE_BYTE (64) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM3/
DMIMX8MM3_cm4_features.h224 #define FSL_FEATURE_L1ICACHE_LINESIZE_BYTE (16) macro
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM2/
DMIMX8MM2_cm4_features.h224 #define FSL_FEATURE_L1ICACHE_LINESIZE_BYTE (16) macro

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