Searched refs:FRGPLLCLKDIV_OFFSET (Results 1 – 5 of 5) sorted by relevance
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT685S/drivers/ |
D | fsl_clock.h | 481 #define FRGPLLCLKDIV_OFFSET 0x6FC macro 791 …kCLOCK_DivPllFrgClk = CLKCTL1_TUPLE_MUXA(FRGPLLCLKDIV_OFFSET, 0), /*!< Pll Frg Clk Divider.…
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT633S/drivers/ |
D | fsl_clock.h | 481 #define FRGPLLCLKDIV_OFFSET 0x6FC macro 791 …kCLOCK_DivPllFrgClk = CLKCTL1_TUPLE_MUXA(FRGPLLCLKDIV_OFFSET, 0), /*!< Pll Frg Clk Divider.…
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT595S/drivers/ |
D | fsl_clock.h | 607 #define FRGPLLCLKDIV_OFFSET 0x760 macro 981 …kCLOCK_DivPLLFRGClk = CLKCTL1_TUPLE_MUXA(FRGPLLCLKDIV_OFFSET, 0), /*!< P L L F R G Clk Divi…
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT533S/drivers/ |
D | fsl_clock.h | 607 #define FRGPLLCLKDIV_OFFSET 0x760 macro 981 …kCLOCK_DivPLLFRGClk = CLKCTL1_TUPLE_MUXA(FRGPLLCLKDIV_OFFSET, 0), /*!< P L L F R G Clk Divi…
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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT555S/drivers/ |
D | fsl_clock.h | 607 #define FRGPLLCLKDIV_OFFSET 0x760 macro 981 …kCLOCK_DivPLLFRGClk = CLKCTL1_TUPLE_MUXA(FRGPLLCLKDIV_OFFSET, 0), /*!< P L L F R G Clk Divi…
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