Home
last modified time | relevance | path

Searched refs:CTIMER_MCR_MR1R_MASK (Results 1 – 25 of 64) sorted by relevance

123

/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC802/
DLPC802.h1303 #define CTIMER_MCR_MR1R_MASK (0x10U) macro
1307 … (((uint32_t)(((uint32_t)(x)) << CTIMER_MCR_MR1R_SHIFT)) & CTIMER_MCR_MR1R_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC804/
DLPC804.h1685 #define CTIMER_MCR_MR1R_MASK (0x10U) macro
1689 … (((uint32_t)(((uint32_t)(x)) << CTIMER_MCR_MR1R_SHIFT)) & CTIMER_MCR_MR1R_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC844/
DLPC844.h1387 #define CTIMER_MCR_MR1R_MASK (0x10U) macro
1391 … (((uint32_t)(((uint32_t)(x)) << CTIMER_MCR_MR1R_SHIFT)) & CTIMER_MCR_MR1R_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC845/
DLPC845.h1793 #define CTIMER_MCR_MR1R_MASK (0x10U) macro
1797 … (((uint32_t)(((uint32_t)(x)) << CTIMER_MCR_MR1R_SHIFT)) & CTIMER_MCR_MR1R_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC51U68/
DLPC51U68.h1419 #define CTIMER_MCR_MR1R_MASK (0x10U) macro
1423 … (((uint32_t)(((uint32_t)(x)) << CTIMER_MCR_MR1R_SHIFT)) & CTIMER_MCR_MR1R_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC54113/
DLPC54113.h1387 #define CTIMER_MCR_MR1R_MASK (0x10U) macro
1391 … (((uint32_t)(((uint32_t)(x)) << CTIMER_MCR_MR1R_SHIFT)) & CTIMER_MCR_MR1R_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC54114/
DLPC54114_cm4.h1386 #define CTIMER_MCR_MR1R_MASK (0x10U) macro
1390 … (((uint32_t)(((uint32_t)(x)) << CTIMER_MCR_MR1R_SHIFT)) & CTIMER_MCR_MR1R_MASK)
DLPC54114_cm0plus.h1375 #define CTIMER_MCR_MR1R_MASK (0x10U) macro
1379 … (((uint32_t)(((uint32_t)(x)) << CTIMER_MCR_MR1R_SHIFT)) & CTIMER_MCR_MR1R_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC54S005/
DLPC54S005.h2015 #define CTIMER_MCR_MR1R_MASK (0x10U) macro
2019 … (((uint32_t)(((uint32_t)(x)) << CTIMER_MCR_MR1R_SHIFT)) & CTIMER_MCR_MR1R_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC54605/
DLPC54605.h1611 #define CTIMER_MCR_MR1R_MASK (0x10U) macro
1615 … (((uint32_t)(((uint32_t)(x)) << CTIMER_MCR_MR1R_SHIFT)) & CTIMER_MCR_MR1R_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC54607/
DLPC54607.h1608 #define CTIMER_MCR_MR1R_MASK (0x10U) macro
1612 … (((uint32_t)(((uint32_t)(x)) << CTIMER_MCR_MR1R_SHIFT)) & CTIMER_MCR_MR1R_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC54005/
DLPC54005.h1607 #define CTIMER_MCR_MR1R_MASK (0x10U) macro
1611 … (((uint32_t)(((uint32_t)(x)) << CTIMER_MCR_MR1R_SHIFT)) & CTIMER_MCR_MR1R_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC54616/
DLPC54616.h3152 #define CTIMER_MCR_MR1R_MASK (0x10U) macro
3156 … (((uint32_t)(((uint32_t)(x)) << CTIMER_MCR_MR1R_SHIFT)) & CTIMER_MCR_MR1R_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC54606/
DLPC54606.h3077 #define CTIMER_MCR_MR1R_MASK (0x10U) macro
3081 … (((uint32_t)(((uint32_t)(x)) << CTIMER_MCR_MR1R_SHIFT)) & CTIMER_MCR_MR1R_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC54016/
DLPC54016.h2867 #define CTIMER_MCR_MR1R_MASK (0x10U) macro
2870 … (((uint32_t)(((uint32_t)(x)) << CTIMER_MCR_MR1R_SHIFT)) & CTIMER_MCR_MR1R_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5504/
DLPC5504.h6497 #define CTIMER_MCR_MR1R_MASK (0x10U) macro
6501 … (((uint32_t)(((uint32_t)(x)) << CTIMER_MCR_MR1R_SHIFT)) & CTIMER_MCR_MR1R_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC54S018M/
DLPC54S018M.h3558 #define CTIMER_MCR_MR1R_MASK (0x10U) macro
3562 … (((uint32_t)(((uint32_t)(x)) << CTIMER_MCR_MR1R_SHIFT)) & CTIMER_MCR_MR1R_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5502CPXXXX/
DLPC5502CPXXXX.h6452 #define CTIMER_MCR_MR1R_MASK (0x10U) macro
6456 … (((uint32_t)(((uint32_t)(x)) << CTIMER_MCR_MR1R_SHIFT)) & CTIMER_MCR_MR1R_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5502/
DLPC5502.h6497 #define CTIMER_MCR_MR1R_MASK (0x10U) macro
6501 … (((uint32_t)(((uint32_t)(x)) << CTIMER_MCR_MR1R_SHIFT)) & CTIMER_MCR_MR1R_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC54018M/
DLPC54018M.h3150 #define CTIMER_MCR_MR1R_MASK (0x10U) macro
3154 … (((uint32_t)(((uint32_t)(x)) << CTIMER_MCR_MR1R_SHIFT)) & CTIMER_MCR_MR1R_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC54S018/
DLPC54S018.h3558 #define CTIMER_MCR_MR1R_MASK (0x10U) macro
3562 … (((uint32_t)(((uint32_t)(x)) << CTIMER_MCR_MR1R_SHIFT)) & CTIMER_MCR_MR1R_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC5504CPXXXX/
DLPC5504CPXXXX.h6452 #define CTIMER_MCR_MR1R_MASK (0x10U) macro
6456 … (((uint32_t)(((uint32_t)(x)) << CTIMER_MCR_MR1R_SHIFT)) & CTIMER_MCR_MR1R_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC54018/
DLPC54018.h3150 #define CTIMER_MCR_MR1R_MASK (0x10U) macro
3154 … (((uint32_t)(((uint32_t)(x)) << CTIMER_MCR_MR1R_SHIFT)) & CTIMER_MCR_MR1R_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC54S016/
DLPC54S016.h3232 #define CTIMER_MCR_MR1R_MASK (0x10U) macro
3235 … (((uint32_t)(((uint32_t)(x)) << CTIMER_MCR_MR1R_SHIFT)) & CTIMER_MCR_MR1R_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC54618/
DLPC54618.h3150 #define CTIMER_MCR_MR1R_MASK (0x10U) macro
3154 … (((uint32_t)(((uint32_t)(x)) << CTIMER_MCR_MR1R_SHIFT)) & CTIMER_MCR_MR1R_MASK)

123