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Searched refs:CPC_CACHE_MODE (Results 1 – 25 of 26) sorted by relevance

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/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1171/drivers/
Dfsl_pgmc.c191 base->CPC_CACHE_MODE = PGMC_CPC_CPC_CACHE_MODE_CTRL_MODE(kPGMC_ControlledByCpuPowerMode); in PGMC_CPC_CACHE_ControlByCpuPowerMode()
239 base->CPC_CACHE_MODE = PGMC_CPC_CPC_CACHE_MODE_CTRL_MODE(kPGMC_ControlledBySetPoint); in PGMC_CPC_CACHE_ControlBySetPointMode()
Dfsl_pgmc.h425 base->CPC_CACHE_MODE = PGMC_CPC_CPC_CACHE_MODE_CTRL_MODE(kPGMC_DisableLowPowerControl); in PGMC_CPC_CACHE_DisableLowPower()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1166/drivers/
Dfsl_pgmc.c191 base->CPC_CACHE_MODE = PGMC_CPC_CPC_CACHE_MODE_CTRL_MODE(kPGMC_ControlledByCpuPowerMode); in PGMC_CPC_CACHE_ControlByCpuPowerMode()
239 base->CPC_CACHE_MODE = PGMC_CPC_CPC_CACHE_MODE_CTRL_MODE(kPGMC_ControlledBySetPoint); in PGMC_CPC_CACHE_ControlBySetPointMode()
Dfsl_pgmc.h425 base->CPC_CACHE_MODE = PGMC_CPC_CPC_CACHE_MODE_CTRL_MODE(kPGMC_DisableLowPowerControl); in PGMC_CPC_CACHE_DisableLowPower()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1175/drivers/
Dfsl_pgmc.c191 base->CPC_CACHE_MODE = PGMC_CPC_CPC_CACHE_MODE_CTRL_MODE(kPGMC_ControlledByCpuPowerMode); in PGMC_CPC_CACHE_ControlByCpuPowerMode()
239 base->CPC_CACHE_MODE = PGMC_CPC_CPC_CACHE_MODE_CTRL_MODE(kPGMC_ControlledBySetPoint); in PGMC_CPC_CACHE_ControlBySetPointMode()
Dfsl_pgmc.h425 base->CPC_CACHE_MODE = PGMC_CPC_CPC_CACHE_MODE_CTRL_MODE(kPGMC_DisableLowPowerControl); in PGMC_CPC_CACHE_DisableLowPower()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1173/drivers/
Dfsl_pgmc.c191 base->CPC_CACHE_MODE = PGMC_CPC_CPC_CACHE_MODE_CTRL_MODE(kPGMC_ControlledByCpuPowerMode); in PGMC_CPC_CACHE_ControlByCpuPowerMode()
239 base->CPC_CACHE_MODE = PGMC_CPC_CPC_CACHE_MODE_CTRL_MODE(kPGMC_ControlledBySetPoint); in PGMC_CPC_CACHE_ControlBySetPointMode()
Dfsl_pgmc.h425 base->CPC_CACHE_MODE = PGMC_CPC_CPC_CACHE_MODE_CTRL_MODE(kPGMC_DisableLowPowerControl); in PGMC_CPC_CACHE_DisableLowPower()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1176/drivers/
Dfsl_pgmc.c191 base->CPC_CACHE_MODE = PGMC_CPC_CPC_CACHE_MODE_CTRL_MODE(kPGMC_ControlledByCpuPowerMode); in PGMC_CPC_CACHE_ControlByCpuPowerMode()
239 base->CPC_CACHE_MODE = PGMC_CPC_CPC_CACHE_MODE_CTRL_MODE(kPGMC_ControlledBySetPoint); in PGMC_CPC_CACHE_ControlBySetPointMode()
Dfsl_pgmc.h425 base->CPC_CACHE_MODE = PGMC_CPC_CPC_CACHE_MODE_CTRL_MODE(kPGMC_DisableLowPowerControl); in PGMC_CPC_CACHE_DisableLowPower()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1172/drivers/
Dfsl_pgmc.c191 base->CPC_CACHE_MODE = PGMC_CPC_CPC_CACHE_MODE_CTRL_MODE(kPGMC_ControlledByCpuPowerMode); in PGMC_CPC_CACHE_ControlByCpuPowerMode()
239 base->CPC_CACHE_MODE = PGMC_CPC_CPC_CACHE_MODE_CTRL_MODE(kPGMC_ControlledBySetPoint); in PGMC_CPC_CACHE_ControlBySetPointMode()
Dfsl_pgmc.h425 base->CPC_CACHE_MODE = PGMC_CPC_CPC_CACHE_MODE_CTRL_MODE(kPGMC_DisableLowPowerControl); in PGMC_CPC_CACHE_DisableLowPower()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1165/drivers/
Dfsl_pgmc.c191 base->CPC_CACHE_MODE = PGMC_CPC_CPC_CACHE_MODE_CTRL_MODE(kPGMC_ControlledByCpuPowerMode); in PGMC_CPC_CACHE_ControlByCpuPowerMode()
239 base->CPC_CACHE_MODE = PGMC_CPC_CPC_CACHE_MODE_CTRL_MODE(kPGMC_ControlledBySetPoint); in PGMC_CPC_CACHE_ControlBySetPointMode()
Dfsl_pgmc.h425 base->CPC_CACHE_MODE = PGMC_CPC_CPC_CACHE_MODE_CTRL_MODE(kPGMC_DisableLowPowerControl); in PGMC_CPC_CACHE_DisableLowPower()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h59468 __IO uint32_t CPC_CACHE_MODE; /**< CPC Cache Mode, offset: 0x40 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm7.h59468 __IO uint32_t CPC_CACHE_MODE; /**< CPC Cache Mode, offset: 0x40 */ member
DMIMXRT1175_cm4.h60370 __IO uint32_t CPC_CACHE_MODE; /**< CPC Cache Mode, offset: 0x40 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h58944 __IO uint32_t CPC_CACHE_MODE; /**< CPC Cache Mode, offset: 0x40 */ member
DMIMXRT1165_cm4.h59846 __IO uint32_t CPC_CACHE_MODE; /**< CPC Cache Mode, offset: 0x40 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm7.h62852 __IO uint32_t CPC_CACHE_MODE; /**< CPC Cache Mode, offset: 0x40 */ member
DMIMXRT1166_cm4.h63754 __IO uint32_t CPC_CACHE_MODE; /**< CPC Cache Mode, offset: 0x40 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h63376 __IO uint32_t CPC_CACHE_MODE; /**< CPC Cache Mode, offset: 0x40 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h64275 __IO uint32_t CPC_CACHE_MODE; /**< CPC Cache Mode, offset: 0x40 */ member
DMIMXRT1173_cm7.h63373 __IO uint32_t CPC_CACHE_MODE; /**< CPC Cache Mode, offset: 0x40 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h74043 __IO uint32_t CPC_CACHE_MODE; /**< CPC Cache Mode, offset: 0x40 */ member

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