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Searched refs:CONFIG (Results 1 – 25 of 148) sorted by relevance

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/hal_nxp-3.7.0/mcux/mcux-sdk/drivers/sctimer/
Dfsl_sctimer.h508 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK)); in SCTIMER_StartTimer()
514 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK)); in SCTIMER_StartTimer()
520 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK)); in SCTIMER_StartTimer()
526 assert(1U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK)); in SCTIMER_StartTimer()
550 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK)); in SCTIMER_StopTimer()
556 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK)); in SCTIMER_StopTimer()
562 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK)); in SCTIMER_StopTimer()
568 assert(1U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK)); in SCTIMER_StopTimer()
676 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK)); in SCTIMER_SetCounterState()
682 assert(0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK)); in SCTIMER_SetCounterState()
[all …]
Dfsl_sctimer.c131 base->CONFIG = SCT_CONFIG_CKSEL(config->clockSelect) | SCT_CONFIG_CLKMODE(config->clockMode) | in SCTIMER_Init()
277 assert(1U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK)); in SCTIMER_SetupPwm()
409 assert(1U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK)); in SCTIMER_UpdatePwmDutycycle()
502 … if ((kSCTIMER_Counter_L == whichCounter) && (0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK))) in SCTIMER_CreateAndScheduleEvent()
522 … else if ((kSCTIMER_Counter_H == whichCounter) && (0U == (base->CONFIG & SCT_CONFIG_UNIFY_MASK))) in SCTIMER_CreateAndScheduleEvent()
545 … else if ((kSCTIMER_Counter_U == whichCounter) && (0U != (base->CONFIG & SCT_CONFIG_UNIFY_MASK))) in SCTIMER_CreateAndScheduleEvent()
/hal_nxp-3.7.0/s32/drivers/s32k3/Mcu/src/
DPower_Ip_PMC.c255 ConfigValue = IP_PMC->CONFIG; in Power_Ip_PMC_PowerInit()
258 IP_PMC->CONFIG = ConfigValue; in Power_Ip_PMC_PowerInit()
263 IP_PMC->CONFIG = (uint32)(ConfigPtr->ConfigRegister & (~(uint32)PMC_CONFIG_LMEN_MASK)); in Power_Ip_PMC_PowerInit()
278 ConfigValue = IP_PMC->CONFIG; in Power_Ip_PMC_PowerInit()
281 IP_PMC->CONFIG = ConfigValue; in Power_Ip_PMC_PowerInit()
290 ConfigValue = IP_PMC->CONFIG; in Power_Ip_PMC_PowerInit()
293 IP_PMC->CONFIG = ConfigValue; in Power_Ip_PMC_PowerInit()
298 IP_PMC->CONFIG = ConfigPtr->ConfigRegister; in Power_Ip_PMC_PowerInit()
307 LastMileRegValue = (IP_PMC->CONFIG & PMC_CONFIG_LMSTAT_MASK); in Power_Ip_PMC_PowerInit()
362 Aec_Ip_SpiRead((uint32)(&(IP_PMC_AE->CONFIG)),POWER_IP_DATAWIDTH_32,&TmpAe); in Power_Ip_PMC_AE_PowerInit()
[all …]
/hal_nxp-3.7.0/mcux/mcux-sdk/drivers/tsi/tsi_v6/
Dfsl_tsi_v6.h875 base->CONFIG = ((base->CONFIG) & ~TSI_CONFIG_TSICH_MASK) | (TSI_CONFIG_TSICH(channel)); in TSI_SetSelfCapMeasuredChannel()
887 return (uint8_t)((base->CONFIG & TSI_CONFIG_TSICH_MASK) >> TSI_CONFIG_TSICH_SHIFT); in TSI_GetSelfCapMeasuredChannel()
969 base->CONFIG = ((base->CONFIG) & ~TSI_CONFIG_MODE_MASK) | (TSI_CONFIG_MODE(mode)); in TSI_SetSensingMode()
980 …return (tsi_sensing_mode_selection_t)(uint32_t)((base->CONFIG & TSI_CONFIG_MODE_MASK) >> TSI_CONFI… in TSI_GetSensingMode()
1006 …base->CONFIG = ((base->CONFIG) & ~TSI_CONFIG_S_NOISE_MASK) | (TSI_CONFIG_S_NOISE(enableCancellatio… in TSI_EnableNoiseCancellation()
Dfsl_tsi_v6.c82 temp = (base->CONFIG) & ~(TSI_CONFIG_MUTUAL_MODE_MASK | TSI_CONFIG_S_SEN_MASK); in TSI_InitSelfCapMode()
83 base->CONFIG = in TSI_InitSelfCapMode()
107 temp = (base->CONFIG) & in TSI_InitSelfCapMode()
109 base->CONFIG = temp | (TSI_CONFIG_S_XDN(config->xdn) | TSI_CONFIG_S_CTRIM(config->ctrim) | in TSI_InitSelfCapMode()
/hal_nxp-3.7.0/mcux/mcux-sdk/cmake/
Dmcux.cmake43 foreach (CONFIG ${DOT_CONFIG_LIST})
44 # CONFIG could look like: CONFIG_NET_BUF=y
47 string(REGEX MATCH "[^=]+" CONF_VARIABLE_NAME ${CONFIG})
50 string(REGEX MATCH "=(.+$)" CONF_VARIABLE_VALUE ${CONFIG})
/hal_nxp-3.7.0/mcux/mcux-sdk/drivers/gdma/
Dfsl_gdma.c193 base->CH[channel].CONFIG |= GDMA_CONFIG_LLE_MASK; in GDMA_SetChannelTransferConfig()
198 base->CH[channel].CONFIG &= ~GDMA_CONFIG_LLE_MASK; in GDMA_SetChannelTransferConfig()
/hal_nxp-3.7.0/mcux/mcux-sdk/drivers/sdma/
Dfsl_sdma.c398 tmpreg = base->CONFIG; in SDMA_Init()
403 base->CONFIG = tmpreg; in SDMA_Init()
537 uint32_t val = base->CONFIG & (~SDMAARM_CONFIG_CSM_MASK); in SDMA_SetContextSwitchMode()
539 base->CONFIG = val; in SDMA_SetContextSwitchMode()
/hal_nxp-3.7.0/mcux/mcux-sdk/drivers/puf_v3/
Dfsl_puf_v3.h290 base->CONFIG |= mask; in PUF_BlockCommand()
/hal_nxp-3.7.0/s32/drivers/s32k3/BaseNXP/header/
DS32K344_PMC.h74 __IO uint32_t CONFIG; /**< PMC Configuration Register, offset: 0x4 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/drivers/port/
Dfsl_port.h331 base->CONFIG = (uint32_t)range; in PORT_SecletPortVoltageRange()
/hal_nxp-3.7.0/mcux/mcux-sdk/drivers/emc/
Dfsl_emc.c209 base->CONFIG = (uint32_t)config->endian; in EMC_Init()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1166/drivers/
Dfsl_clock.h2976 return (((CCM->OSCPLL[name].CONFIG & CCM_OSCPLL_CONFIG_SETPOINT_PRESENT_MASK) >> in CLOCK_OSCPLL_IsSetPointImplemented()
3100 return (((CCM->CLOCK_ROOT[name].CONFIG & CCM_CLOCK_ROOT_CONFIG_SETPOINT_PRESENT_MASK) >> in CLOCK_ROOT_IsSetPointImplemented()
3225 return (((CCM->LPCG[name].CONFIG & CCM_LPCG_CONFIG_SETPOINT_PRESENT_MASK) >> in CLOCK_LPCG_IsSetPointImplemented()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1165/drivers/
Dfsl_clock.h2976 return (((CCM->OSCPLL[name].CONFIG & CCM_OSCPLL_CONFIG_SETPOINT_PRESENT_MASK) >> in CLOCK_OSCPLL_IsSetPointImplemented()
3100 return (((CCM->CLOCK_ROOT[name].CONFIG & CCM_CLOCK_ROOT_CONFIG_SETPOINT_PRESENT_MASK) >> in CLOCK_ROOT_IsSetPointImplemented()
3225 return (((CCM->LPCG[name].CONFIG & CCM_LPCG_CONFIG_SETPOINT_PRESENT_MASK) >> in CLOCK_LPCG_IsSetPointImplemented()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1171/drivers/
Dfsl_clock.h3011 return (((CCM->OSCPLL[name].CONFIG & CCM_OSCPLL_CONFIG_SETPOINT_PRESENT_MASK) >> in CLOCK_OSCPLL_IsSetPointImplemented()
3135 return (((CCM->CLOCK_ROOT[name].CONFIG & CCM_CLOCK_ROOT_CONFIG_SETPOINT_PRESENT_MASK) >> in CLOCK_ROOT_IsSetPointImplemented()
3260 return (((CCM->LPCG[name].CONFIG & CCM_LPCG_CONFIG_SETPOINT_PRESENT_MASK) >> in CLOCK_LPCG_IsSetPointImplemented()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1175/drivers/
Dfsl_clock.h3011 return (((CCM->OSCPLL[name].CONFIG & CCM_OSCPLL_CONFIG_SETPOINT_PRESENT_MASK) >> in CLOCK_OSCPLL_IsSetPointImplemented()
3135 return (((CCM->CLOCK_ROOT[name].CONFIG & CCM_CLOCK_ROOT_CONFIG_SETPOINT_PRESENT_MASK) >> in CLOCK_ROOT_IsSetPointImplemented()
3260 return (((CCM->LPCG[name].CONFIG & CCM_LPCG_CONFIG_SETPOINT_PRESENT_MASK) >> in CLOCK_LPCG_IsSetPointImplemented()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1172/drivers/
Dfsl_clock.h3011 return (((CCM->OSCPLL[name].CONFIG & CCM_OSCPLL_CONFIG_SETPOINT_PRESENT_MASK) >> in CLOCK_OSCPLL_IsSetPointImplemented()
3135 return (((CCM->CLOCK_ROOT[name].CONFIG & CCM_CLOCK_ROOT_CONFIG_SETPOINT_PRESENT_MASK) >> in CLOCK_ROOT_IsSetPointImplemented()
3260 return (((CCM->LPCG[name].CONFIG & CCM_LPCG_CONFIG_SETPOINT_PRESENT_MASK) >> in CLOCK_LPCG_IsSetPointImplemented()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1176/drivers/
Dfsl_clock.h3011 return (((CCM->OSCPLL[name].CONFIG & CCM_OSCPLL_CONFIG_SETPOINT_PRESENT_MASK) >> in CLOCK_OSCPLL_IsSetPointImplemented()
3135 return (((CCM->CLOCK_ROOT[name].CONFIG & CCM_CLOCK_ROOT_CONFIG_SETPOINT_PRESENT_MASK) >> in CLOCK_ROOT_IsSetPointImplemented()
3260 return (((CCM->LPCG[name].CONFIG & CCM_LPCG_CONFIG_SETPOINT_PRESENT_MASK) >> in CLOCK_LPCG_IsSetPointImplemented()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1173/drivers/
Dfsl_clock.h3011 return (((CCM->OSCPLL[name].CONFIG & CCM_OSCPLL_CONFIG_SETPOINT_PRESENT_MASK) >> in CLOCK_OSCPLL_IsSetPointImplemented()
3135 return (((CCM->CLOCK_ROOT[name].CONFIG & CCM_CLOCK_ROOT_CONFIG_SETPOINT_PRESENT_MASK) >> in CLOCK_ROOT_IsSetPointImplemented()
3260 return (((CCM->LPCG[name].CONFIG & CCM_LPCG_CONFIG_SETPOINT_PRESENT_MASK) >> in CLOCK_LPCG_IsSetPointImplemented()
/hal_nxp-3.7.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_SBSW.h86 …__IO uint32_t CONFIG; /**< TMC Configuration, array offset: 0x20, array… member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC810/
DLPC810.h2567 __IO uint32_t CONFIG; /**< SCT configuration register, offset: 0x0 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC812/
DLPC812.h2571 __IO uint32_t CONFIG; /**< SCT configuration register, offset: 0x0 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC811/
DLPC811.h2567 __IO uint32_t CONFIG; /**< SCT configuration register, offset: 0x0 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC834/
DLPC834.h3992 __IO uint32_t CONFIG; /**< SCT configuration register, offset: 0x0 */ member
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/LPC832/
DLPC832.h3992 __IO uint32_t CONFIG; /**< SCT configuration register, offset: 0x0 */ member

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