CCM_REG_SET (reference) in projects: hal_nxp-3.7.0

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Searched refs:CCM_REG_SET (Results 1 – 25 of 43) sorted by relevance

/hal_nxp-3.7.0/imx/drivers/
D	ccm_imx7d.h	`50 #define CCM_REG_SET(root) CCM_REG_OFF(root, 4) macro 381 CCM_REG_SET(ccmRoot) = CCM_TARGET_ROOT_SET_ENABLE_MASK; in CCM_EnableRoot()`
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN5/drivers/
D	fsl_clock.c	`920 CCM_REG_SET(ccgr) = (uintptr_t)kCLOCK_ClockNeededAll; in CLOCK_EnableClock() 926 CCM_REG_SET(rootClk) = CCM_TARGET_ROOT_SET_ENABLE_MASK; in CLOCK_EnableClock()`
D	fsl_clock.h	`178 #define CCM_REG_SET(root) CCM_REG_OFF(root, 4U) macro 1109 CCM_REG_SET(rootClk) = CCM_TARGET_ROOT_SET_ENABLE_MASK; in CLOCK_EnableRoot()`
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN1/drivers/
D	fsl_clock.c	`920 CCM_REG_SET(ccgr) = (uintptr_t)kCLOCK_ClockNeededAll; in CLOCK_EnableClock() 926 CCM_REG_SET(rootClk) = CCM_TARGET_ROOT_SET_ENABLE_MASK; in CLOCK_EnableClock()`
D	fsl_clock.h	`178 #define CCM_REG_SET(root) CCM_REG_OFF(root, 4U) macro 1109 CCM_REG_SET(rootClk) = CCM_TARGET_ROOT_SET_ENABLE_MASK; in CLOCK_EnableRoot()`
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN3/drivers/
D	fsl_clock.c	`920 CCM_REG_SET(ccgr) = (uintptr_t)kCLOCK_ClockNeededAll; in CLOCK_EnableClock() 926 CCM_REG_SET(rootClk) = CCM_TARGET_ROOT_SET_ENABLE_MASK; in CLOCK_EnableClock()`
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8ML4/drivers/
D	fsl_clock.c	`935 CCM_REG_SET(ccgr) = (uint32_t)kCLOCK_ClockNeededAll; in CLOCK_EnableClock() 942 CCM_REG_SET(rootClk) = CCM_TARGET_ROOT_SET_ENABLE_MASK; in CLOCK_EnableClock()`
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM6/drivers/
D	fsl_clock.c	`926 CCM_REG_SET(ccgr) = (uintptr_t)kCLOCK_ClockNeededAll; in CLOCK_EnableClock() 932 CCM_REG_SET(rootClk) = CCM_TARGET_ROOT_SET_ENABLE_MASK; in CLOCK_EnableClock()`
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8ML6/drivers/
D	fsl_clock.c	`935 CCM_REG_SET(ccgr) = (uint32_t)kCLOCK_ClockNeededAll; in CLOCK_EnableClock() 942 CCM_REG_SET(rootClk) = CCM_TARGET_ROOT_SET_ENABLE_MASK; in CLOCK_EnableClock()`
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN2/drivers/
D	fsl_clock.c	`920 CCM_REG_SET(ccgr) = (uintptr_t)kCLOCK_ClockNeededAll; in CLOCK_EnableClock() 926 CCM_REG_SET(rootClk) = CCM_TARGET_ROOT_SET_ENABLE_MASK; in CLOCK_EnableClock()`
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8ML3/drivers/
D	fsl_clock.c	`935 CCM_REG_SET(ccgr) = (uint32_t)kCLOCK_ClockNeededAll; in CLOCK_EnableClock() 942 CCM_REG_SET(rootClk) = CCM_TARGET_ROOT_SET_ENABLE_MASK; in CLOCK_EnableClock()`
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM1/drivers/
D	fsl_clock.c	`926 CCM_REG_SET(ccgr) = (uintptr_t)kCLOCK_ClockNeededAll; in CLOCK_EnableClock() 932 CCM_REG_SET(rootClk) = CCM_TARGET_ROOT_SET_ENABLE_MASK; in CLOCK_EnableClock()`
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN4/drivers/
D	fsl_clock.c	`920 CCM_REG_SET(ccgr) = (uintptr_t)kCLOCK_ClockNeededAll; in CLOCK_EnableClock() 926 CCM_REG_SET(rootClk) = CCM_TARGET_ROOT_SET_ENABLE_MASK; in CLOCK_EnableClock()`
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MN6/drivers/
D	fsl_clock.c	`920 CCM_REG_SET(ccgr) = (uintptr_t)kCLOCK_ClockNeededAll; in CLOCK_EnableClock() 926 CCM_REG_SET(rootClk) = CCM_TARGET_ROOT_SET_ENABLE_MASK; in CLOCK_EnableClock()`
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM5/drivers/
D	fsl_clock.c	`926 CCM_REG_SET(ccgr) = (uintptr_t)kCLOCK_ClockNeededAll; in CLOCK_EnableClock() 932 CCM_REG_SET(rootClk) = CCM_TARGET_ROOT_SET_ENABLE_MASK; in CLOCK_EnableClock()`
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM4/drivers/
D	fsl_clock.c	`926 CCM_REG_SET(ccgr) = (uintptr_t)kCLOCK_ClockNeededAll; in CLOCK_EnableClock() 932 CCM_REG_SET(rootClk) = CCM_TARGET_ROOT_SET_ENABLE_MASK; in CLOCK_EnableClock()`
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM3/drivers/
D	fsl_clock.c	`926 CCM_REG_SET(ccgr) = (uintptr_t)kCLOCK_ClockNeededAll; in CLOCK_EnableClock() 932 CCM_REG_SET(rootClk) = CCM_TARGET_ROOT_SET_ENABLE_MASK; in CLOCK_EnableClock()`
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8ML8/drivers/
D	fsl_clock.c	`935 CCM_REG_SET(ccgr) = (uint32_t)kCLOCK_ClockNeededAll; in CLOCK_EnableClock() 942 CCM_REG_SET(rootClk) = CCM_TARGET_ROOT_SET_ENABLE_MASK; in CLOCK_EnableClock()`
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MM2/drivers/
D	fsl_clock.c	`926 CCM_REG_SET(ccgr) = (uintptr_t)kCLOCK_ClockNeededAll; in CLOCK_EnableClock() 932 CCM_REG_SET(rootClk) = CCM_TARGET_ROOT_SET_ENABLE_MASK; in CLOCK_EnableClock()`
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MQ6/drivers/
D	fsl_clock.c	`1059 CCM_REG_SET(ccgr) = (uint32_t)kCLOCK_ClockNeededAll; in CLOCK_EnableClock() 1063 CCM_REG_SET(rootClk) = CCM_TARGET_ROOT_SET_ENABLE_MASK; in CLOCK_EnableClock()`
D	fsl_clock.h	`169 #define CCM_REG_SET(root) CCM_REG_OFF(root, 4U) macro 1061 CCM_REG_SET(rootClk) = CCM_TARGET_ROOT_SET_ENABLE_MASK; in CLOCK_EnableRoot()`
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MQ7/drivers/
D	fsl_clock.c	`1059 CCM_REG_SET(ccgr) = (uint32_t)kCLOCK_ClockNeededAll; in CLOCK_EnableClock() 1063 CCM_REG_SET(rootClk) = CCM_TARGET_ROOT_SET_ENABLE_MASK; in CLOCK_EnableClock()`
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MD7/drivers/
D	fsl_clock.c	`1059 CCM_REG_SET(ccgr) = (uint32_t)kCLOCK_ClockNeededAll; in CLOCK_EnableClock() 1063 CCM_REG_SET(rootClk) = CCM_TARGET_ROOT_SET_ENABLE_MASK; in CLOCK_EnableClock()`
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MQ5/drivers/
D	fsl_clock.c	`1059 CCM_REG_SET(ccgr) = (uint32_t)kCLOCK_ClockNeededAll; in CLOCK_EnableClock() 1063 CCM_REG_SET(rootClk) = CCM_TARGET_ROOT_SET_ENABLE_MASK; in CLOCK_EnableClock()`
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMX8MD6/drivers/
D	fsl_clock.c	`1059 CCM_REG_SET(ccgr) = (uint32_t)kCLOCK_ClockNeededAll; in CLOCK_EnableClock() 1063 CCM_REG_SET(rootClk) = CCM_TARGET_ROOT_SET_ENABLE_MASK; in CLOCK_EnableClock()`

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