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Searched refs:CCM_ANALOG_PLL_VIDEO_ENABLE_MASK (Results 1 – 21 of 21) sorted by relevance

/hal_nxp-3.7.0/mcux/mcux-sdk/boards/evkmimxrt1040/
Dclock_config.c408 CCM_ANALOG->PLL_VIDEO &= ~CCM_ANALOG_PLL_VIDEO_ENABLE_MASK; in BOARD_BootClockRUN()
415 CCM_ANALOG_PLL_VIDEO_ENABLE_MASK |CCM_ANALOG_PLL_VIDEO_DIV_SELECT(31); in BOARD_BootClockRUN()
842 CCM_ANALOG->PLL_VIDEO &= ~CCM_ANALOG_PLL_VIDEO_ENABLE_MASK; in BOARD_BootClockRUN_600M()
849 CCM_ANALOG_PLL_VIDEO_ENABLE_MASK |CCM_ANALOG_PLL_VIDEO_DIV_SELECT(31); in BOARD_BootClockRUN_600M()
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/evkbimxrt1050/
Dclock_config.c412 CCM_ANALOG->PLL_VIDEO &= ~CCM_ANALOG_PLL_VIDEO_ENABLE_MASK; in BOARD_BootClockRUN()
419 CCM_ANALOG_PLL_VIDEO_ENABLE_MASK |CCM_ANALOG_PLL_VIDEO_DIV_SELECT(31); in BOARD_BootClockRUN()
851 CCM_ANALOG->PLL_VIDEO &= ~CCM_ANALOG_PLL_VIDEO_ENABLE_MASK; in BOARD_BootClockRUN_528M()
858 CCM_ANALOG_PLL_VIDEO_ENABLE_MASK |CCM_ANALOG_PLL_VIDEO_DIV_SELECT(31); in BOARD_BootClockRUN_528M()
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/evkcmimxrt1060/
Dclock_config.c426 CCM_ANALOG->PLL_VIDEO &= ~CCM_ANALOG_PLL_VIDEO_ENABLE_MASK; in BOARD_BootClockRUN()
433 CCM_ANALOG_PLL_VIDEO_ENABLE_MASK |CCM_ANALOG_PLL_VIDEO_DIV_SELECT(31); in BOARD_BootClockRUN()
879 CCM_ANALOG->PLL_VIDEO &= ~CCM_ANALOG_PLL_VIDEO_ENABLE_MASK; in BOARD_BootClockRUN_528M()
886 CCM_ANALOG_PLL_VIDEO_ENABLE_MASK |CCM_ANALOG_PLL_VIDEO_DIV_SELECT(31); in BOARD_BootClockRUN_528M()
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/evkbmimxrt1060/
Dclock_config.c427 CCM_ANALOG->PLL_VIDEO &= ~CCM_ANALOG_PLL_VIDEO_ENABLE_MASK; in BOARD_BootClockRUN()
434 CCM_ANALOG_PLL_VIDEO_ENABLE_MASK |CCM_ANALOG_PLL_VIDEO_DIV_SELECT(31); in BOARD_BootClockRUN()
880 CCM_ANALOG->PLL_VIDEO &= ~CCM_ANALOG_PLL_VIDEO_ENABLE_MASK; in BOARD_BootClockRUN_528M()
887 CCM_ANALOG_PLL_VIDEO_ENABLE_MASK |CCM_ANALOG_PLL_VIDEO_DIV_SELECT(31); in BOARD_BootClockRUN_528M()
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/evkmimxrt1060/
Dclock_config.c427 CCM_ANALOG->PLL_VIDEO &= ~CCM_ANALOG_PLL_VIDEO_ENABLE_MASK; in BOARD_BootClockRUN()
434 CCM_ANALOG_PLL_VIDEO_ENABLE_MASK |CCM_ANALOG_PLL_VIDEO_DIV_SELECT(31); in BOARD_BootClockRUN()
880 CCM_ANALOG->PLL_VIDEO &= ~CCM_ANALOG_PLL_VIDEO_ENABLE_MASK; in BOARD_BootClockRUN_528M()
887 CCM_ANALOG_PLL_VIDEO_ENABLE_MASK |CCM_ANALOG_PLL_VIDEO_DIV_SELECT(31); in BOARD_BootClockRUN_528M()
/hal_nxp-3.7.0/mcux/mcux-sdk/boards/evkmimxrt1064/
Dclock_config.c429 CCM_ANALOG->PLL_VIDEO &= ~CCM_ANALOG_PLL_VIDEO_ENABLE_MASK; in BOARD_BootClockRUN()
436 CCM_ANALOG_PLL_VIDEO_ENABLE_MASK |CCM_ANALOG_PLL_VIDEO_DIV_SELECT(31); in BOARD_BootClockRUN()
884 CCM_ANALOG->PLL_VIDEO &= ~CCM_ANALOG_PLL_VIDEO_ENABLE_MASK; in BOARD_BootClockRUN_528M()
891 CCM_ANALOG_PLL_VIDEO_ENABLE_MASK |CCM_ANALOG_PLL_VIDEO_DIV_SELECT(31); in BOARD_BootClockRUN_528M()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1052/drivers/
Dfsl_clock.c836 CCM_ANALOG_PLL_VIDEO_ENABLE_MASK | CCM_ANALOG_PLL_VIDEO_DIV_SELECT(config->loopDivider); in CLOCK_InitVideoPll()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1041/drivers/
Dfsl_clock.c774 CCM_ANALOG_PLL_VIDEO_ENABLE_MASK | CCM_ANALOG_PLL_VIDEO_DIV_SELECT(config->loopDivider); in CLOCK_InitVideoPll()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1042/drivers/
Dfsl_clock.c774 CCM_ANALOG_PLL_VIDEO_ENABLE_MASK | CCM_ANALOG_PLL_VIDEO_DIV_SELECT(config->loopDivider); in CLOCK_InitVideoPll()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1051/drivers/
Dfsl_clock.c832 CCM_ANALOG_PLL_VIDEO_ENABLE_MASK | CCM_ANALOG_PLL_VIDEO_DIV_SELECT(config->loopDivider); in CLOCK_InitVideoPll()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1061/drivers/
Dfsl_clock.c840 CCM_ANALOG_PLL_VIDEO_ENABLE_MASK | CCM_ANALOG_PLL_VIDEO_DIV_SELECT(config->loopDivider); in CLOCK_InitVideoPll()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1062/drivers/
Dfsl_clock.c840 CCM_ANALOG_PLL_VIDEO_ENABLE_MASK | CCM_ANALOG_PLL_VIDEO_DIV_SELECT(config->loopDivider); in CLOCK_InitVideoPll()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1064/drivers/
Dfsl_clock.c840 CCM_ANALOG_PLL_VIDEO_ENABLE_MASK | CCM_ANALOG_PLL_VIDEO_DIV_SELECT(config->loopDivider); in CLOCK_InitVideoPll()
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h9150 #define CCM_ANALOG_PLL_VIDEO_ENABLE_MASK (0x2000U) macro
9152 …int32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_ENABLE_SHIFT)) & CCM_ANALOG_PLL_VIDEO_ENABLE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h8075 #define CCM_ANALOG_PLL_VIDEO_ENABLE_MASK (0x2000U) macro
8077 …int32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_ENABLE_SHIFT)) & CCM_ANALOG_PLL_VIDEO_ENABLE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h9410 #define CCM_ANALOG_PLL_VIDEO_ENABLE_MASK (0x2000U) macro
9412 …int32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_ENABLE_SHIFT)) & CCM_ANALOG_PLL_VIDEO_ENABLE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h8078 #define CCM_ANALOG_PLL_VIDEO_ENABLE_MASK (0x2000U) macro
8080 …int32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_ENABLE_SHIFT)) & CCM_ANALOG_PLL_VIDEO_ENABLE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h9152 #define CCM_ANALOG_PLL_VIDEO_ENABLE_MASK (0x2000U) macro
9154 …int32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_ENABLE_SHIFT)) & CCM_ANALOG_PLL_VIDEO_ENABLE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h9414 #define CCM_ANALOG_PLL_VIDEO_ENABLE_MASK (0x2000U) macro
9416 …int32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_ENABLE_SHIFT)) & CCM_ANALOG_PLL_VIDEO_ENABLE_MASK)
/hal_nxp-3.7.0/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h9492 #define CCM_ANALOG_PLL_VIDEO_ENABLE_MASK (0x2000U) macro
9494 …int32_t)(((uint32_t)(x)) << CCM_ANALOG_PLL_VIDEO_ENABLE_SHIFT)) & CCM_ANALOG_PLL_VIDEO_ENABLE_MASK)
/hal_nxp-3.7.0/imx/devices/MCIMX6X/
DMCIMX6X_M4.h5913 #define CCM_ANALOG_PLL_VIDEO_ENABLE_MASK 0x2000u macro